DEAD TIME TO CONTROL 2 SYNCHRONOUS MOSFET (BUCK CONVERTER) help!!!!!!!

[Altera_Forum]

HELLO.  

I AM A STUDENT AND I AM TRYING TO IMPLEMENT AN STATE MACHINE TO CONTROL A BUCK CONVERTER. IN THIS PART OF CODE, I AM TRYING TO COMMUTE 2 MOSFET (HIGH SIDE AND LOW SIDE). EACH 20ms MOSFET1 (m1) IS IN "ON" AND MOSFET1 (m2) IN "OFF" AND THEN REVERSE.  UP THIS POINT, THE CODE WORKS. BUT, I NEED TO PROGRAM A DEAD TIME TO PREVENT 2 MOSFETS ARE IN STATE "ON" DURING THE COMMUTATION TO AVOID A DEAD SHORT OF THE SOURCE. I put that this dead time has to be of 60ns. It is to assure that (for example): when m1 pass from state "1" to "0" then count to 60ns and then (we are assured that m1 doesn't work) to active m2 '1'. the delay part of the code is not here. i don't know how to do. it seems to be easy but....the condition "after" or "wait" is not permited because this code is for implementing and "after" and "wait" is only for simulation!!!  some help? thank you very much in advance!! &#8203;     entity controllersource is generic(timeM: integer:= 1000000); --20 ms (switching time between Mosfets) generic(timeR: integer:= 3); --60 ns (delay to avoid being 2 MOSFETS in "on" state at the same time)   Port( clk : in std_logic;  rst : in std_logic;  m1: out std_logic; -- Mosfet HIGH side   m2: out std_logic); -- Mosfet LOW side  end entity;   architecture c1 of controllersource is    signal counter: unsigned(23 downto 0);  signal cont: unsigned(23 downto 0);  signal y: std_logic;   begin   counter: process (clk, rst) begin  if rst = '1' then  counter<=(others => '0');  cont<=(others => '0');  elsif (clk'EVENT and clk = '1') then -- 1 clock period each 50Mhz   counter<=counter+1;  cont<=cont+1;  if counter=timeM then -- 20ms  counter<=(others => '0');  end if;  if cont=tiempoR then -- 60ns  cont<=(others => '0');  end if;  end if; end process;   commutation: process (clk, rst) begin   if rst = '1' then  m1<='1';  m2<='0';  y<='0';  elsif (clk'EVENT and clk = '1') then  if counter=timeM then --every time that arrive to 20ms commute the state of mosfets   if y='0' then  y<='1';  m1<='0';  m2<='1';  else  y<='0';  m2<='0';  m1<='1';   end if;  end if;  end if; end process;   end c1;

[Altera_Forum]

You could only do it in terms of number of clocks. If you need exactly 60ns, you'll need a clock that can make 60 ns via a counter.

[Altera_Forum]

I've built a similar process for a resonant converter. As Tricky said the dead time has to be expressed in numbers of clock cycles. However, you should also include an external device (external to the fpga) to prevent cross conduction. This is because FPGAs can occasionally glitch and that may cause both outputs to go high unintentionally, and that would cause a short across your FETs. The way I did this is by using a triple NOR gate chip (something like 74HC27... i forget the details). You need to make an analog circuit using these NOR gates to ensure that even if both high side and low side signal go high simultaneously, you analog circuit suppresses that. So the analog circuit logic should be if NOR(H,L) = 1, then set H to 0 and L to 0. In this case if H = 1 and L = 1 then the NOR circuit will shutdown both signals.