Damaged Cyclone 3 Chips

[Altera_Forum]

I am using a Cyclone 3 EP3C10E144C7N chip that is mounted on a third party board (the schematics of the board is attached in the file DB3C10.pdf). This board's I/O pins are interfacing with the I/O pins from a MAX EPM7128S PLD chip. 

 After using this setup for a few weeks, my C3 chip suddenly died. I found that one of the IOBank pins, as well as the VCCINT pin, is shorted to ground. Thinking that it was bad luck on my part, i replaced the board with another one. However, a few weeks later, my second C3 chip died as well! This time, a different IOBank pin, as well as the VCCINT pin, was found to be shorted.   I currently have no clue what might have caused my C3 chip to be damaged. I am connecting the I/O pins of the MAX chip directly to the I/O pins of the C3 chip. The MAX chip's VCCINT is set to be 5V, and its VCCIO is set to be 3.3V. The C3 chip's VCCINT is set to be at 1.2V, and its 8 IOBANKS are all set at 3.3V. I did not take note of the current flowing into the C3 from the MAX chip.   Any enlightenment on this issue would be very much appreciated. http://www.alteraforum.com/forum//images/icons/icon10.gif

[Altera_Forum]

--- Quote Start ---  I am using a Cyclone 3 EP3C10E144C7N chip that is mounted on a third party board (the schematics of the board is attached in the file DB3C10.pdf). This board's I/O pins are interfacing with the I/O pins from a MAX EPM7128S PLD chip.   After using this setup for a few weeks, my C3 chip suddenly died. I found that one of the IOBank pins, as well as the VCCINT pin, is shorted to ground. Thinking that it was bad luck on my part, i replaced the board with another one. However, a few weeks later, my second C3 chip died as well! This time, a different IOBank pin, as well as the VCCINT pin, was found to be shorted.   I currently have no clue what might have caused my C3 chip to be damaged. I am connecting the I/O pins of the MAX chip directly to the I/O pins of the C3 chip. The MAX chip's VCCINT is set to be 5V, and its VCCIO is set to be 3.3V. The C3 chip's VCCINT is set to be at 1.2V, and its 8 IOBANKS are all set at 3.3V. I did not take note of the current flowing into the C3 from the MAX chip.   Any enlightenment on this issue would be very much appreciated. http://www.alteraforum.com/forum//images/icons/icon10.gif   --- Quote End ---    Hi,  check the default setting of unused pins. At least older versions of Quartus are setting unused pins to "Output driving Ground". I'm not sure that Cyclone 3 devices could directly connected to 3.3V signals. Check in the datasheet.  Kind regards  GPK

[Altera_Forum]

I have checked the settings for unused pins already. They are set to be high impedance input with weak pull up resistor.

[Altera_Forum]

3.3V VCCIO and input voltage is O.K. with Cyclone III, if you consider the necessary precautions against voltage overshoot and keep the allowed maximum ratings. This involves at least source sided serial termination resistances for 3.3V logic signals directed to the Cyclone III. Please consult the respective application notes. 

 The reported chip damage seems to indicate huge voltage transients, also at VCCINT. I can't determine from a distance, how this can happen in your circuit, but it's surely possible. If I understand right, your mini evaluation board has pin headers connected directly to the Cyclone III pins, without any additional protection. Depending on the connected circuit, I can well imagine that higher energy interferences may enter the board.

[Altera_Forum]

Thanks pletz and FvM! 

 Does it mean that when there is a short circuit between VCCINT and gnd, as well as between the IOBANKs and gnd, there is a very high chance that this is due to high voltage transients?   For my VCCINT, the 1.2V input is actually produced by a voltage regulator. The last i checked, my voltage regulator is working as it should be. From what i heard, the output of voltage regulators should be pretty stable right?   From the application notes, it is recommended that i apply a series resistor to the I/O pins to minimize voltage overshoot. But if i add a resistor for each I/O pin (which in my case runs up to something like 55pins), it'll be quite tedious. So before i embark on doing this tedious task, i'd just like to verify that there is a high possibility that my chip died really because of the absence of these series resistors.

[Altera_Forum]

i suspect FvM is correct, you will want to use input series resistors with CIII devices.