Programmable Devices
CPLDs, FPGAs, SoC FPGAs, Configuration, and Transceivers
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Design Environment (Desktop Performance)

Altera_Forum
Почетный участник II
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FPGA is Big Enough, but the simulation takes too long. 

 

When we try to design with the actual target board, the timing simulation might take pretty long time with bigger logics. 

Recently, I was being annoyed with the in-built simulator from Quartus. 

 

Well, we might stick to poor desktops for the finance issues while we can't be using Modelsim only all the time to match the real behaviours. 

 

Would you recommend Some Desktop Specs for better speeds on simulations? 

 

CPU? 

MEMORY Banks with 64-bit OS? 

or Graphic Card? 

 

Which one claims most??
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Altera_Forum
Почетный участник II
483Просмотр.

Most big FPGA designs don't do timing simulations anymore for this reason. RTL simulations and static timing analysis(TimeQuest) should cover everything.

Altera_Forum
Почетный участник II
483Просмотр.

It was helpful with your comment.

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