Disabled JTAG circuitry pins connection

[Altera_Forum]

Hallo, 

 I have to connect a daughterboard to a system of my own (main board) which is almost pin-compatible with my previous design. The only problem, is that for a JTAG which I will not use in the daughterboard, in my main board I have the pins which go to TDI and TMS grounded. TDO is open and TCK is also grounded.   In the Cyclone III Device Family Pin Connection Guidelines document it specifies that in order to disabling the JTAG circuitry, I have to connect TDI and TMS to VCC. I do not understand that specification, as TDI and TMS values will be irrelevant to the system as long as TCK remains grounded (which I have).   Can anybody tell me if I will have any problem leaving those TDI and TMS connected to ground instead to VCC? I can not unfortunately modify any of the two boards involved.   Thank you in advance

[Altera_Forum]

I expect, that the JTAG circuit is safely disabled under normal conditions by only grounding TCK.

[Altera_Forum]

Thank you very much, I thought also the same way... if TCK performs no flanks should TDI and TMS not be taken into account by the slave JTAG in the FPGA... I only hope it will not explode when I switch it on ;)

[Altera_Forum]

It surely won't explode. But I remember cases, where a too high TCK pull-down resistor (10K instead of 1K) made the JTAG circuit pick up interferences and caused configuration reset or similar kinds of failure. I think, the chance to hit valid boundary scan commands by accident and cause dangerous IO actions is very small.