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EP3C16E144 JTAG and AS problem!

Altera_Forum
Honored Contributor II
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The JTAG chain can't be find, but the AS configuration is successful, why? 

 

MSEL1 is connected to 2.5V directly, MSEL0 and MSEL2 to GND. 

nCE is connected to GND directly. 

TCK is pull down with 1K resister to GND, TDI and TMS to 2.5V with 10K resister. 

The back pad is connected to GND. 

 

The power up sequence is 2.5V before 1.2V and 3.3V approximately 5ms. 

The DC/DC module of 2.5V is LT1117, and the DC/DC module of 1.2V and 3.3V is LT1959, the start noise of the LT1959 circuit can be find at scope. 

 

Why the JTAG chain can't be find?
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Altera_Forum
Honored Contributor II
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It all sounds correct. Whilst you've specified the rail sequence Cyclone III will tolerate the rails coming up in any order. So, I can only suggest a build or design fault. 

 

Are you happy all the power and ground pins are connected? You mention the thermal pad - are you happy that's soldered correctly. Cyclone III devices don't work correctly without this pad connected. See this recent thread that discusses it: problem with jtag configuration cyclone iii (http://www.alteraforum.com/forum/showthread.php?t=46656). 

 

Cheers, 

Alex
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Altera_Forum
Honored Contributor II
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--- Quote Start ---  

It all sounds correct. Whilst you've specified the rail sequence Cyclone III will tolerate the rails coming up in any order. So, I can only suggest a build or design fault. 

 

Are you happy all the power and ground pins are connected? You mention the thermal pad - are you happy that's soldered correctly. Cyclone III devices don't work correctly without this pad connected. See this recent thread that discusses it: problem with jtag configuration cyclone iii (http://www.alteraforum.com/forum/showthread.php?t=46656). 

 

Cheers, 

Alex 

--- Quote End ---  

 

 

There has a hole at the bottom of the device on the board, i think i did solder it well, for the .pof file being programmed to the EPCS4 successfully at AS mode, and it also run well after power up. 

 

Unfortunately, the AS mode can not be programmed now, i doubt the noise of the power circuit has completely damage the configuration function of this FPGA, but unexplained.
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Altera_Forum
Honored Contributor II
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I pulled down the nCE pin with 10k resister to ground, i think this is right at AS mode. 

I re- solder a new EP3C16E144 to this board, but the JTAG mode can not work as before. 

 

Then, I solder another board without this power circuit, but make 1.2V, 2.5V and 3.3V power supply from other systems, ok, the AS and JTAG mode work well.  

I think the power circuit problem is that the LT1076 to LT1959 has generate some noise, it can destroy partial function of the FPGA, the power scheme of this system must re- design now.
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Altera_Forum
Honored Contributor II
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Hi, 

have you also checked that none of the voltage rails have some overshoot on startup or at time the FPGA starts operation (i.e. increased current flow) that exceeds the limits given in the datasheet?
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