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EPM7064s INPUT/OE/GCLK pins connection while using ISP(JTAG)

Altera_Forum
Honored Contributor II
‎01-30-2014 12:01 PM
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Hello, 

 

At the moment I'm a student at Avans Hogeschool in the Netherlands. I want to use the EPM7064s CPLD for a project. 

 

I would like to program it with JTAG. I only have a question about how I need to connect the 4 dedicated INPUT / OE / GCLK / GCLRn pins when I want to use the ISP function with JTAG. Pin 1, 2, 43 and 44 of the EPM7064s, 44-pin PLCC package. 

 

For example, do I have to pull those pins up with a resistor? 

 

Thanks, 

 

Michiel
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Altera_Forum
Honored Contributor II
‎01-30-2014 03:19 PM
367 Views

You need to drive them to a valid I/O voltage. To quote a report file: 

 

--- Quote Start ---  

This pin should be connected to GND. It may also be connected to a valid signal on the board (low, high, or toggling) if that signal is required for a different revision of the design. 

--- Quote End ---  

 

 

Regards, 

Alex
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