Programmable Devices
CPLDs, FPGAs, SoC FPGAs, Configuration, and Transceivers
Comunicados
FPGA community forums and blogs on community.intel.com are migrating to the new Altera Community and are read-only. For urgent support needs during this transition, please visit the FPGA Design Resources page or contact an Altera Authorized Distributor.
21615 Discussões

Error booting linux on Nios II on Stratix V

Altera_Forum
Colaborador honorário II
1.307 Visualizações

I made the necessary kernel images (as per instructions on :http://www.rocketboards.org/foswiki/documentation/niosiilinuxusermanual#building_u_45boot

Now, when I try to nios2-download -g ~/linux-socfpga/vmlinux && nios2-terminal 

I get the following error : 

 

Using cable "DE5 Standard [2-1.7]", device 1, instance 0x00 

Pausing target processor: OK 

Initializing CPU cache (if present) 

OK 

Downloaded 3523KB in 5.1s (690.7KB/s) 

Verifying C0000000 ( 0%) 

Verify failed between address 0xC0000000 and 0xC000FFFF 

Leaving target processor paused 

 

Is this because my memory is incorrectly configured? 

Also,  

 

1. On the page (http://www.rocketboards.org/foswiki/documentation/niosiilinuxusermanualforstratixiv

Under To boot Nios II linux from CFI flash, we make a proper address mapping, programming the u-boot image first (at the CPU base address), then the DTB and then the Linux kernel with built in rootfs. 

 

In the method (To boot Nios II linux from RAM), we do no such thing, neither do we program u-boot nor anything related to rootfs. All it says is that we compile the .dts file into the kernel (in make menuconfig). Is this *all* that is required ? 

 

2. My error says conflict between 0xC0000000 and 0xC000FFFF ; why and how does it reach to 0xC ?  

 

I'd greatly appreciate any help on this.
0 Kudos
1 Responder
Altera_Forum
Colaborador honorário II
372 Visualizações

Can I get any assistance on this? 

How can I solve this error?
Responder