Error using while converting code to VHDL

[Altera_Forum]

Dear All, 

I am trying to find delay between two signals using cross correlation on FPGA .Kindly can some one please help me how i can do that. Any link or any useful information,I would really appreciate your time please.  Best regards Jamil Hayder

[Altera_Forum]

I cannot open the file because I don't have the software, but I assume the names are all correct. If you have code, could you post that in a post instead of an attachment? What is connected to output port 1? Is this an array with a single element?

[Altera_Forum]

--- Quote Start ---  I cannot open the file because I don't have the software, but I assume the names are all correct. If you have code, could you post that in a post instead of an attachment? What is connected to output port 1? Is this an array with a single element?  --- Quote End ---    @Pietr.Thanks for your reply.I have written the code in my post. In figure there are 4 blocka two i/n and one o/p block. The code above is written in function block the middle one.Can you check it please. here is code  x1=[1 2 3 4 5 6 7 8 9]; x2=[3 4 5 6 7 8 9 2 1]; n=length(x1); xc=zeros(2*n-1,1); for i=1:2*n-1  if(i>n)  j1=1;  k1=2*n-i;  j2=i-n+1;  k2=n;  else  j1=n-i+1;  k1=n;  j2=1;  k2=i;  end  xc(i)=sum(conj(x1(j1:k1)).*x2(j2:k2)); end xc=flipud(xc);

[Altera_Forum]

The HDL Coder does not tell you anything more? 

What is connected to port 1?

[Altera_Forum]

--- Quote Start ---  The HDL Coder does not tell you anything more? What is connected to port 1?  --- Quote End ---      Hi,I have not connected any hardware to my computer.Just have a Matlab function and trying to convert to VHDL. For the data type in VHDL (generated code using HDL coder) ,some variables have data types of double .I should expect data type int32 why this error? Please help!