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Error while running University Program waveform

Rezef
Novice
559 Views

So,guys, I am trying to debug my Bram module that I have used.My FPGA board is altera de-2 115 cyclone 2 device family with ep2c35 serial.

This is my block ram code which is used to initialize the ram with hex data of pictures coverted using matloab.

module bram_p(clk,inbus,outbus,addr,we);
parameter DATAFILE="Sample80x80.hex";
parameter RAM_WIDTH =24;
parameter RAM_ADDR_BITS=13;
parameter INIT_START_ADDR= 0;
parameter INIT_END_ADDR=6399;
input clk,we;
input [RAM_WIDTH-1:0]inbus;
output reg [RAM_WIDTH-1:0]outbus;
input [RAM_ADDR_BITS-1:0]addr;
(* ramstyle = "M4K" *)reg[RAM_WIDTH-1:0]mem[(2**RAM_ADDR_BITS)-1:0];
initial begin
$readmemh(DATAFILE,mem, INIT_START_ADDR, INIT_END_ADDR);
end

always @(posedge clk)begin
if (we)begin
mem[addr] <=inbus;
end
outbus<=mem[addr];
end
endmodule

I have attached the hex fille and the warning images I get when I tryh to simulate using UWF

 

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1 Solution
Rezef
Novice
458 Views

Yes, I managed to make the University Waveform Program work, I didn't understand why it didn't work in the first place. But after creating a new project wizard and running the code in a different location, it worked perfectly. I am sorry for the late reply and thanks for your reply to my post

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4 Replies
IntelSupport
Community Manager
527 Views

From the error message snapshot, I can see your path name Image_processing with verilog.

Try to remove the space and simulate it again.



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IntelSupport
Community Manager
501 Views

Hi,


May I know if there is any update?



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IntelSupport
Community Manager
501 Views

Hi,


May I know if there is any update?



0 Kudos
Rezef
Novice
459 Views

Yes, I managed to make the University Waveform Program work, I didn't understand why it didn't work in the first place. But after creating a new project wizard and running the code in a different location, it worked perfectly. I am sorry for the late reply and thanks for your reply to my post

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