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Hello,
For any simulation in Quartus we do, always tech maps map to primitives in specific device (specific LUTs, etc.), the RTL view is rather generic. And for ModelSim integrated into Quartus, since the language simulation syntax is generic, its internal representation should also be generic. Since we already have good and validated RTL here in Quartus and Modelsim, can either of them be exported to an industrial generic format? For example, if the design is purely limited to digital and a standard voltage (say 1.8V), can either support exporting to PMOS/NMOS netlists? GregLink Copied
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