External Memory required for JTAG programming?

[Altera_Forum]

I am in the early stages of designing an RF transmitter that will operate with a Cyclone II. Testing is being done on a Cyclone II Starter Development Kit (EP2C20F484), but the final hardware will use a very simple implementation of the EP2C8T144. 

 The design is a proof-of-concept, so only JTAG programming will be necessary (no need for non-volatile AS programming). We are assuming this implementation will not require external memory. A 10-pin header connected to the Cyclone II's TDO, TMS, TCK, and TDI pins, with appropriate pull-up and pull-down resistors will be used with a USB Blaster for programming.   Are these assumptions correct? That is, no additional memory is required for JTAG, but non-volatile programming would require flash memory?

[Altera_Forum]

Yes, correct. You may want to provide an optional AS configuration memory, if you have sufficient free pins available (at least as dual-purpose). It can be programmed through JTAG indirectly without needing an extra programming connector.

[Altera_Forum]

--- Quote Start ---  Yes, correct. You may want to provide an optional AS configuration memory, if you have sufficient free pins available (at least as dual-purpose). It can be programmed through JTAG indirectly without needing an extra programming connector.  --- Quote End ---    By "indirectly" you mean the "flash-loader" design of Altera that can be programmed into the Cyclone?

[Altera_Forum]

Yes, the technique has been named JTAG indirect programming by Altera. The most simple solution for production purposes is to use the Altera default SFL image.