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I just want to use the signal generator to trigger one IO pin of FPGA externally. On FPGA , this trigger sigal will be captured on the rising edge.
But, when I just connect the IO pin on FPGA to the cable which will be connected to the sigal generator or oscillograph, the trigger starts, it works so easy that I can't control it, what's interesting is that it works even when I toutch the pin. Then I measure the voltage of my fingers which is about 500 mV. FPGA Information: LVTTL selected, 10 pf loaded, dual-in-line pin used as the input trigger. Does anybody kind of use external trigger, and know why this happened? JohnLink Copied
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If your input floats, 500mV is enough to get it triggered. You need at least a pull-up to prevent this. I don't know if the internal pull-up is sufficient for this.
More than sufficient is the following circuit: pull-up resistor of 10K from pin to power, a Capacitor of 100pF from pin to ground, a series resistor of 100 Ohm from your board input to pin and a pair of protection diodes from board input to power and ground (BAV99). You can change the component properties depending on your signal speed. The circuit not only prevents triggering, but also protects your FPGA from damaging. Good luck, Ton- Mark as New
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--- Quote Start --- pair of protection diodes from board input to power and ground (BAV99). --- Quote End --- TVS diode is better solution now. http://en.wikipedia.org/wiki/transient_voltage_suppression_diode http://www.vishay.com/diodes/list/product-81673/
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Thanks ,Ton and BOND! Good advice for me! Really appreciatate that!
So, why just 500 mV can do the things that 3 V or some can do? IS it because electromagnetic interface, for that float pins can be affected larger interface than others?- Mark as New
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--- Quote Start --- So, why just 500 mV --- Quote End --- Because you measuring wrong. How you measure 500mv?
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I use oscillograph to measure max voltage. What's wrong?
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--- Quote Start --- I use oscillograph to measure max voltage. What's wrong? --- Quote End --- Set oscillograph in waiting mode. Use probe with low input capacitance. If you have a cat, play with them. After, touch a probe.
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The circuit is like this?file:///C:/DOCUME~1/john/LOCALS~1/Temp/]%60@4C)%7BKA%7DYCJN@K9%7BI~LJG.jpg
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--- Quote Start --- The circuit is like this?file:///C:/DOCUME~1/john/LOCALS~1/Temp/]%60@4C)%7BKA%7DYCJN@K9%7BI~LJG.jpg --- Quote End --- Sorry. I can't hack you computer. :)
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Aha, that's funny!
How to upload picture? I got a similar one http://www.google.com.hk/imglanding?q=input%20clamp%20circuit&imgurl=http://courses.cit.cornell.edu/ee476/finalprojects/s2008/ksk33_hgk5/ksk33_hgk5/figure4.jpg&imgrefurl=http://courses.cit.cornell.edu/ee476/finalprojects/s2008/ksk33_hgk5/ksk33_hgk5/index.html&usg=__oievgyyi-f5mzlrqljbkr4pfd_w=&h=543&w=485&sz=12&hl=zh-cn&sig2=wxwut3hdpdntljckxfv5qw&...- Mark as New
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--- Quote Start --- Aha, that's funny! How to upload picture? --- Quote End --- http://imageshack.us/
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:) http://img822.imageshack.us/i/fpga.jpg/ (http://img822.imageshack.us/i/fpga.jpg/)
Now ,I will ask is the circuit like this
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