F2H Avalon Bridge is stuck... How to release?

[Altera_Forum]

Hello, 

  In my design, I use the F2H Avalon Bridge to directly access the SDRAM Memory Controller located in the HPS.   For some reason, the bridge is stuck (the hps_0_f2h_sdram0_data_waitrequest signal, which is coming from HPS is stuck to HIGH). Why? Actually no one should access the SDRAM Controller in HPS besides FPGA through the Avalon bridge... MPUs do not run any code, only U-Boot is located in the external DDR3 memory...   Should I run the "bridge_enable_handoff” command from the U-Boot prompt in order to open the Avalon Bridge?   How can I release the Avalon Bridge? How can I debug why it's stuck?   Thank you!

[Altera_Forum]

Hi, 

 you have to release the bridges from reset after loading the FPGA-Image.  For that purpose you either have to generate a new preloader (u-boot SPL) with your current design or figure out the correct fpga2sdram_handoff. It can be gathered from the hps.xml inside the generated hps_isw_handoff folder in the project location.  It should look like something like this:   <config name="F2SDRAM_COMMAND_PORT_USED" value="0x3"/> <config name="F2SDRAM_READ_PORT_USED" value="0x1"/> <config name="F2SDRAM_WRITE_PORT_USED" value="0x1"/> <config name="F2SDRAM_RESET_PORT_USED" value="0x311"/>   You want to use in this case the 0x311 as fpga2sdram_handoff.  Now you just have to boot the board to u-boot-stage, load the FPGA-Image and then type:   setenv fpga2sdram_handoff 0x311 run bridge_enable_handoff   After that the bridge should be released and you can go on doing further jobs...  After project finishes, you would want to generate a preloader (u-boot SPL) with the correct values, then a simple   run bridge_enable_handoff   is enough, due to the hand over from preloader environment to u-boot environment. (And also because of that, a saveenv for the fpga2sdram_handoff will not work, it gets overwritten after reboot...!!!)  I hope that helps