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FPGA Mechanical Pressure Limit

Altera_Forum
Honored Contributor II
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We are using the FPGA Stratix IV (EP4SE530H35C3NES) using an adhesive backed heat sink. 

 

The heat sink vendor recommends 10 psi of pressure for obtaining a good bond but that translates into 28 lbs of force on the device. 

 

What is the maximum or recommend force/pressure that can be applied to this device? 

 

Thanks, 

Joe
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Altera_Forum
Honored Contributor II
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Not a guarantee... I'm not Altera. But it's highly unlikely that the device would break under that load, evenly distributed. Assuming it is already on a board, you simply need to have the whole board resting on some compliant, yet firm surface (rubber pad, electrostatically protected). Your worst case scenario would be pressing on the middle of a board that is supported elsewhere (i.e. the corners, edges). The first thing to fail would be the solder itself, or the delamination of the surface copper layers, and it could occur under the FPGA or any other chip, due to the board flexure.

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