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How do I determine the clock frequency of the HPS peripherals and edit them? In particular the CAN controller clock, can_clk. And I guess also, l4_sp_clk, since the CAN controller uses both these clocks.
From what I have been able to read from the clock manager and CAN documentation, the HPS peripherals clock is derived from pin EOSC1 (frequency/source ?), and a part of the Peripheral Clock Group, specifically, Peripheral PLL C4 --> periph_base_base_clk --> can0_clk.Link copiado
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In the preloader generator tools you would specify what the clock frequency is and pick what you want for the CAN and L4 SP clock frequencies to be. It should then create the correct PLL initialization code to program the peripheral PLL in the clock manager to match what you asked for. The peripheral PLL can use EOSC1 or EOSC2 as clock source pins or even clocks driven in by the FPGA fabric, most people use EOSC1 though.
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By preloader generator tools, do you mean the bsp-editor? If so I don't see the options in the GUI (windows btw) for setting the frequencies, but when creating a new bsp using the editor it does generate pll_config.h which allows me to edit the clock frequencies. I am not exactly sure what steps I need to go from here with the generated files.
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Sorry I forgot the name is BSP editor now. It's been a while since I looked at CAN but if that interface protocol operates at fixed frequencies which I suspect it does then that might be why that frequency is not editable (no need to ask if it can't change). Is the L4 SP clock frequency editable? If not then I suspect it is set to the maximum possible frequency by default. If you do edit the include files that are generated just remember that if you run BSP editor again your hand edits will be wiped out.
As you can probably see I've never actually used the software tools before :)- Marcar como novo
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I have a similar problem: where takes the bsp-editor the settings for generating the pll_config.h. It seams to me, that it will use a default for the all Devices, but what if I use a Device with lower speedgrade, (e.g. The Cyclon V of the SocKit Board from Arrow ). Have I always modify after each generation the pll_config.h by hand?
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You might find this to be handy: http://rocketboards.org/foswiki/documentation/preloaderclockingcustomization
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Thanks a lot BadOmen, this site is really helpfull and it confirms me, that for Main and Peripheral PLLs I have to change the pll_config.h between generation from bsp-editor and building the preloader.

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