Programmable Devices
CPLDs, FPGAs, SoC FPGAs, Configuration, and Transceivers

HardCopy Chip size

Altera_Forum
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Hi, 

 

I have a question about the chip size of hardcopy. In a case of my real gate 

count is much less than the usable gate count, is the chip size going to be 

smaller as well? Pin count is also much less than the available I/Os. Thank you! 

 

 

Peter Chang
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Altera_Forum
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--- Quote Start ---  

Hi, 

 

I have a question about the chip size of hardcopy. In a case of my real gate 

count is much less than the usable gate count, is the chip size going to be 

smaller as well? Pin count is also much less than the available I/Os. Thank you! 

 

 

Peter Chang 

--- Quote End ---  

 

 

Hi, 

 

HardCopy devices have their programmability removed and are available only in certain packages. They die size is maybe smaller due to removed programmability. The number of I/O's depends on the package. As far a I know you can not scale down the number of I/O's. 

 

 

Kind regard 

 

GPK
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Altera_Forum
명예로운 기여자 II
727 조회수

Hi GPK. 

 

Thanks for your answer. If it is as you said, then the size can't be scaled down too. 

It isn't as good as what I expected. Anyway, thanks a lot! 

 

 

Regards, 

 

 

Peter Chang
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