- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Report Inappropriate Content
So I've built a custom FPGA development board that basically breaks out all the IO to headers, groups the power into 3 rails driven by an external bench supply and I've adjusted my J-tag wiring to match page 7-35 of the Altera Datasheet CV-52007 for the 5CEBA2F23C8N Cyclone V FPGA I'm using. I've also tried the Passive serial wiring from 7-31 of the same datasheet. (Both configurations I've used the appropriate MSEL connections from another page(s) of the same datasheet.)
Using the most current version of Quartus with a USB Blaster II to try and program the chip in Jtag mode I get a "Error (209040): Can't access JTAG chain" and "Error (209012): Operation failed"
and programming fails. Trying to program in Passive Serial programming mode I get Error (209035): Device chain in use" and "Error (209008): Configuration failed" and programming fails.
I need help troubleshooting this. Presently I'm not sure if this is a hardware issue (bad power supply config, board fabrication issue, USB Blaster II issue, etc), or a software issue in Quartus.
I know my basic VHDL test code is good. I have experience writing VHDL in college and using it on Altera built demonstration boards back then, but this is the first circuit board with an FPGA I've created my self.
I suspect power supply since I can't find a very good datasheet material on the power supply requirements beyond a table of pin voltages. One thing that's made the process of making my own development board tricky is datasheet fragmentation. I haven't been able to find one datasheet with all the info I need but instead find bits and pieces in multiple sheets and not all at the same time or in the same place. A schematic of the power wiring is included below.
Link Copied
- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Report Inappropriate Content
Hello,
To make sure your power supply to FPGA meeting the FPGA requirements, could you please check below signals?
1- nCONFIG(active low) - turn low-then-high when FPGA completed power ramp up and start to enter configuration mode
2- nSTATUS(active low) - turn low-then-high when FPGA enters configuration mode.
3- CONF_DONE (active high)- turn high when FPGA completed configuration, and enter user mode.
If you dont see activity of above signals, the power supply is not meeting device requirements.
regards,
Farabi
- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Report Inappropriate Content
- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Report Inappropriate Content
Hello,
Please check your pin connection by referring to pin connection guideline : https://www.intel.com/content/www/us/en/content-details/654351/cyclone-v-gx-gt-e-sx-st-and-se-device-family-pin-connection-guidelines.html
regards,
Farabi

- Subscribe to RSS Feed
- Mark Topic as New
- Mark Topic as Read
- Float this Topic for Current User
- Bookmark
- Subscribe
- Printer Friendly Page