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Hi everyone, maybe someone of you guys could help me, im currently working on a rescue vehicle; this vehicle works with RF module using PIC's in order to transmit the data from the sensors that are equipped in the vehicle. My main problem is that i want to communicate the PIC's serial with the DE2 Board RS232 module, i wonder if someone could handle me some example code in order to work over it, cause telling you the truth im really rookie on Verilog/VHDL programming language. Any help is always good.
Thanks A lot.Link Copied
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Well I can't give you code but I can give you advice. Rather than trying to work with your current hardware, slow down. hook up a PC with a low baud rate (say 9600) and use a 3 wire serial connection to the uart and send very basic binary streams; use a program like hyperterminal (on all windows machines) or putty (the new one has a serial port option as well). Don't try to tackle a huge project all at once; break it into bite size chunks. UARTs are very basic devices and a very good place to start with a small project to learn some vhdl/verilog and then move on to bigger stuff. Nothing will shatter your confidence more than constant failure because you took on a huge job rather than a Project broken down into many small modules that you can successfully build and test.
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Well I looked at the user manual for the DE2, it looks like it only uses the MAX232 which is primarily for converting voltage levels. Have you looked on your CD for design examples of using the Port. RS232 is about as easy as it gets for a serial connection. Unless you need to, don't worry about all the control signals that a traditional 9 wire design uses, if your design is simple start with Rx, Tx and GND (or maybe only TX and GND) and your own port. There are examples on the web to look at too (opencores is a place to start), but be careful, they may introduce the extra control signals, which you don't need for basic communication over RS232. Look at the protocol, use a basic version like 8N1. And probably just implement a TX module, that send 10101011 over and over. You will need to use a clock divider or PLL (pll is best, but may be hard for beginners to understand exactly what a PLL does, but you can use it without necessarily understanding everything about it) to get your 9600 baud frequency to transmit. Then it's just a matter of generating the sequence and understanding what a start bit, stop bit, and data is.
Another thing to note is that typically receiving modules tend to sample the data bits in the middle of the transmitted bit; you use the start bit to realize "something happened" and then you synch to the first edge of the start bit and aim at sampling in the middle of each bit as that gives you as much "slop" as you can get, given that source and receiver clocks will never really be in tune and running at _exactly_ the same rate in the majority of circumstances.- Mark as New
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Thanks a lot alt1000, ive got a very nice book for vhdl beginners and im starting to making test only with the rs232 module and my laptop. Im also using the pll for my 9600 bauds of transmision, but still doesnt work its just matter of time; maybe im not using it the right way so now my main problem is on hardware stuff wich is easier.
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Well you should check your PLL output clock (for 9600 baud, for example) out one of your user accessible pins and look at it on a scope to confirm it is exactly the frequency that you want. I suggest doing the same for your system clock as well. Also you might also (for a receive unit on your fpga) introduce in the same PLL block a clock out that is a multiple (something large, maybe 16times (9600*16 = 153600Hz) or 32 times (or even more) your 9600 Hz) for sampling the incoming rx signal at the middle of the "ideal" bits. That way you should get very low bit error rates because of asynchronous clocks. In a sense rs232 is self timing due to the timing being based on a start bit. Eventually you'll probably want to come up with your own checksuming or CRC, depending on your system and it's ability to handle faulty data.

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