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Hi all,
I'm currently investigating an FFT application where the input frequency range is 30-500 MHz. As the highest operating clock frequency for Altera devices is around 420 MHz this would suggest that a single FFT solution is not feasible as Fs must exceed 1 GHz in order to eliminate aliasing issues. Various architectural options can be selected in the Megacore wizard that suggest parallel implementation such as FFT engine architecture: single/quad, and number of parallel FFT engines: 1/2/4. (These options depend on the I/O data flow mechanism selected). The issue is that none of these options appear to provide true parallel operation as the number of outputs remains constant regardless of the selections made. This can be seen by compiling the design and observing the I/O of the symbol created. Additionally, I have compared timimg results for single and dual-engine architectures and seen identical results for both designs: the dual-engine provided the same number of output samples/sec as the single engine. (Presumably this is what would be expected anyway as the outputs can only appear at a rate of Fs). My question is has anyone performed the FFT at frequencies in the 1 GHz range? (Ideally Fs would be around 2 Ghz to improve performance). I have done some research on this and it appears that it's not a simple task. I have so far identified one source that claims to have achieved FFT at a sampling rate of 2 GHz although there's very little information provided. Any suggestions would be much appreciated. NGL.Link Copied
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