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21615 Discussions

Hold time is not satisfied

Altera_Forum
Honored Contributor II
‎12-12-2011 02:25 AM
1,102 Views

I created a project with sopc builder，it included nios ii、pipeline bridge、ddr2 controller、onchip memory and a module i writed。The clock was used the ddr2‘s sysclk。After compilation，a critical warning occured，the hold time is not satisfied， GE_sopc_inst|the_ddr2|ddr2_controller_phy_inst|ddr2_phy_inst| 

ddr2_phy_alt_mem_phy_inst|dpio|ddr_clkdiv_gen.grp_gen[3].slaves_gen[0]. 

clk_div_slave|clkout -0.013 

How can i solve this problem？
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Altera_Forum
Honored Contributor II
‎12-20-2011 06:22 AM
356 Views

Hi  

 

I think you can specify the set_min_delay between the path 

 

GE_sopc_inst|the_ddr2|ddr2_controller_phy_inst|ddr 2_phy_inst|  

ddr2_phy_alt_mem_phy_inst|dpio|ddr_clkdiv_gen.grp_gen[3].slaves_gen[0].clk_div_slave|clkout 

 

to remove the hold time violation
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