Programmable Devices
CPLDs, FPGAs, SoC FPGAs, Configuration, and Transceivers
21337 Discussions

How can I use M9K RAM Memory in CycloneIII ??

Altera_Forum
Honored Contributor II
1,482 Views

Hello Everybody !.. 

 

I have seen in CIII datasheet that it has a different kind of RAM block called M9K, with higher frequency. 

 

When I use "reg" is this a M9K?? 

 

I Use Verilog, How can i define and use this Memory Block?  

 

A solution without using SOPC builder is preferred. 

 

Thanks
0 Kudos
6 Replies
Altera_Forum
Honored Contributor II
753 Views

 

--- Quote Start ---  

Hello Everybody !.. 

 

I have seen in CIII datasheet that it has a different kind of RAM block called M9K, with higher frequency. 

 

When I use "reg" is this a M9K?? 

 

I Use Verilog, How can i define and use this Memory Block?  

 

A solution without using SOPC builder is preferred. 

 

Thanks 

--- Quote End ---  

 

 

Hi, 

 

you can do that by using : 

 

reg [0:7] my_ram[0:63] /* synthesis ramstyle = "M9K" */; 

 

But why do you want to specify the RAM implementation ? 

 

 

Knd regards 

 

GPK
0 Kudos
Altera_Forum
Honored Contributor II
753 Views

 

--- Quote Start ---  

Hi, 

 

you can do that by using : 

 

reg [0:7] my_ram[0:63] /* synthesis ramstyle = "M9K" */; 

 

But why do you want to specify the RAM implementation ? 

 

 

Knd regards 

 

GPK 

--- Quote End ---  

 

 

i have a solution of my project which has a lot of shift registers and i can have maximum 125 MHz in my algorithm. 

 

I saw that M9K type ram block has a very high frequency and wondered if i can increase my frequency..
0 Kudos
Altera_Forum
Honored Contributor II
753 Views

 

--- Quote Start ---  

i have a solution of my project which has a lot of shift registers and i can have maximum 125 MHz in my algorithm. 

 

I saw that M9K type ram block has a very high frequency and wondered if i can increase my frequency.. 

--- Quote End ---  

 

 

Hi, 

 

do you have problems to achieve your required clock speed ? Are you shift registers as register implemented ? 

 

Kind regards 

 

GPK
0 Kudos
Altera_Forum
Honored Contributor II
753 Views

Use the MegaWizard plug-in manager if you want to create a ram-based shift register. It's under the "Memory Compiler" section. 

 

Jake
0 Kudos
Altera_Forum
Honored Contributor II
753 Views

 

--- Quote Start ---  

Hi, 

 

do you have problems to achieve your required clock speed ? Are you shift registers as register implemented ? 

 

Kind regards 

 

GPK 

--- Quote End ---  

 

 

Yes, My registers are defined as you mentioned above, like this. 

 

reg [0:7] my_ram[0:63] 

 

I don't have a trouble of speed, my current solution works fine but it would be fine it it could work faster.
0 Kudos
Altera_Forum
Honored Contributor II
753 Views

 

--- Quote Start ---  

Use the MegaWizard plug-in manager if you want to create a ram-based shift register. It's under the "Memory Compiler" section. 

 

Jake 

--- Quote End ---  

 

 

thanks jakobjones, this was what i was looking for..
0 Kudos
Reply