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Now,I use the "V-Series Avalon-MM DMA Interface for PCIe "hard core for the data translation between fpga and host computer .Sometimes,the project in FPGA may get the command from host computer or host computer may get the status of the project in FPGA.Based in the situation ,we need some registers .The "V-Series Avalon-MM DMA Interface for PCIe "datasheet shows that BAR0~5 can respond of it ,but I don't clear how to use it.Can you give me some suggestions?
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