How to connect DDR2 clock?

[Altera_Forum]

In my design, a DDR2 SDRAM module is connected to the EP3C120, but I don't know how to connect the clk pins. There are two pairs of differential clk signal in my DDR2 SDRAM module: clk0, clkn0, clk1 and clkn1. Can they be connected to the regular user I/O? Thanks!

[Altera_Forum]

use the pll_out_p and pll_out_n

[Altera_Forum]

But in the EP3C120, each pll has only one pair of clock output signals. But my DDR2 SDRAM module requires two pairs. Should I connect them to two different plls respectively?

[Altera_Forum]

You can just use regular IO pins. Just make sure you run the fitter in Quartus and address any ALTMEMPHY complaints before laying out the PCB.