CPLDs, FPGAs, SoC FPGAs, Configuration, and Transceivers
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I generate a memory controller for SDR-SDRAM through SOPC-BUILDER, but I have error: "sdram.s1 must be connected an Avalon-MM master". :cool: How can I make this connection?
You add the Avalon-MM master just like you added the SDRAM. The Avalon-MM master is in "Bridges and Adapters" in "Memory Mapped" as "Avalon_mm Tristate Bridge"
