How to connect on-chip FIFO in QSYS?

[Altera_Forum]

Hi all, 

 I believe that my problem is very simple, but i'm new in QSYS and can't prepare a working design for FIFO.  I have DB4CGX15 development board and building PCIe design.  On current step i'm trying to move data from I/O port to PC through PCIe.  PCIe core is working perfect, DMA and onchip memory are also working good.  Now i'm trying to connect onchip FIFO to my design but it doesn't work. I'm tried to connect dual-clock FIFO (there is problem with rdreset_n signal, bug?). So, now it's a simple FIFO with the same in/out clock and he doesn't store my data, when i send him data, i get 0x00 back.  What is wrong? Can someone help with right connection, please?   Thanks for help!   https://www.alteraforum.com/forum/attachment.php?attachmentid=6638 https://www.alteraforum.com/forum/attachment.php?attachmentid=6639

[Altera_Forum]

Are you sure you are enabling the RCON and WCON bits in the control register of the DMA? With the memory mapped FIFO you need the DMA to access the same address to read/write to the FIFO and by default the DMA will increment it's access (for memory to memory type operations). 

 So to read data from the FIFO and shoot it across PCIe you want to have the RCON bit set to 1 and WCON set to 0 (read from fixed address, write to a block of memory). To write data over PCIe into the FIFO you want to set RCON to 0 and WCON to 1 (write block of memory to fixed address).