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New Contributor I
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How to instantiate LVDS IOBUF by HDL for Arria10 device?

I understand for slow speed IO, one can use GPIO IP. But I'm used to direct code instantiation. (A habit from using Xilinx IBUFDS).

 

After some searching, I found ALTIOBUF IP. But Arria10 is not supported, so I don't see any template in .eda/sim_lib as mentioned in UG-01024.

 

https://www.intel.com/content/www/us/en/programmable/support/support-resources/knowledge-base/soluti...

States: For some older devices, one can't instantiate a differential buffer in your design. I'm also curious how to implement LVDS IO without buffer, or is buffer implicitly referred in those devices.

Thanks,

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Employee
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Well, this IP is not meant for Arria 10. In Arria 10, you may refer to this IP.

https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/ug/ug_altera_lvds.pdf

 

To instantiate this IP, simply search this IP in IP catelogue and then click on it.

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New Contributor I
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Hi Bruce,

 

Thanks for your info, I'm afraid all I want is simple LVDS I/O buffer not serdes.

My colleague showed me the old trick, by just assigning _p pins as LVDS standard and termination. Inside HDL code use _p as output buffer. It's not intuitive, but project seems compiled. I will try to get into details to confirm.

 

Regards,

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Employee
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Oh, if you are looking for the LVDS I/O only but not the serdes, you may try this IP.

https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/ug/archives/ug_altera_gpio-...

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