I understand for slow speed IO, one can use GPIO IP. But I'm used to direct code instantiation. (A habit from using Xilinx IBUFDS).
After some searching, I found ALTIOBUF IP. But Arria10 is not supported, so I don't see any template in .eda/sim_lib as mentioned in UG-01024.
States: For some older devices, one can't instantiate a differential buffer in your design. I'm also curious how to implement LVDS IO without buffer, or is buffer implicitly referred in those devices.
Well, this IP is not meant for Arria 10. In Arria 10, you may refer to this IP.
To instantiate this IP, simply search this IP in IP catelogue and then click on it.
Thanks for your info, I'm afraid all I want is simple LVDS I/O buffer not serdes.
My colleague showed me the old trick, by just assigning _p pins as LVDS standard and termination. Inside HDL code use _p as output buffer. It's not intuitive, but project seems compiled. I will try to get into details to confirm.