Programmable Devices
CPLDs, FPGAs, SoC FPGAs, Configuration, and Transceivers
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I am using an Arria 10 GX and cannot get any signals out of bank 2L, the 3V bank. I can move the signals to bank 2K at 1.8 V and they are fine. The VCCIO for bank 2L is at 2.98V on all three pins but the bank is acting as though it is not active while all

MBynu
初学者
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of other bank are working fine. Is there a setting I am missing to activate bank 2L?

 

Thanks,

Mike

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YuanLi_S_Intel
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Hi Mike,

 

No special setting is required. Can you check if the VCCIO power rail is stable? Also, the 3V I/O Bank can use 3.0V and above I/O standard only.

 

Thank You.

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