Programmable Devices
CPLDs, FPGAs, SoC FPGAs, Configuration, and Transceivers
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I would like to know how to instantiate megawizard programs in my code. please help!

Altera_Forum
Honored Contributor II
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I want to learn everything about megawizard, instantiating the inbuilt code and about libraries related to that. please give me sufficient guidance how to do it.

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Altera_Forum
Honored Contributor II
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For what version of quartus?

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Altera_Forum
Honored Contributor II
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and what language?

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Altera_Forum
Honored Contributor II
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Hi Naveen, 

 

I would suggest to go through the Altera Online Training "https://www.altera.com/support/training/curricula.html

 

I remember there are some training that shows how to do that.
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Altera_Forum
Honored Contributor II
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Hi Naveen, 

 

For the megawizard flow, go to IP Catalog and select the IP and specify design description. After generate all the IPs user manually connect all the IPs using rtl or vhdl.
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Altera_Forum
Honored Contributor II
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Hi Naveen, 

 

Instantiating your IP would look something like this in Verilog 

 

pll u1 ( 

.reset (<fill this in with your declared port name>) 

.inclk (<fill this in with your declared port name>) 

.locked (<fill this in with your declared port name>) 

); 

 

This is just example. If this is confusing to you, maybe you should refer to some websites on how to instantiate a module.
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Altera_Forum
Honored Contributor II
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--- Quote Start ---  

I want to learn everything about megawizard, instantiating the inbuilt code and about libraries related to that. please give me sufficient guidance how to do it. 

--- Quote End ---  

 

 

You can look into the transceiver design examples at Altera wiki (http://www.alterawiki.com/wiki/category:transceivers). These designs should have the info related to megawizard generated instances, how to instantiate these into top level and together with simulation examples.
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