I2C Level Shift use PLD

[Altera_Forum]

Does anyone know how to implement a i2c level shift use PLD, verilog or vhdl is OK. Thanks advance!

[Altera_Forum]

You cannot easily use an FPGA to perform I2C level shifting, since it needs to act as a bridge (since there would be two different I2C buses), you're better off using devices like the LTC4313 

 http://www.linear.com/product/ltc4313  that page has a link to Linear Technologies other I2C buffers, i.e.,  http://www.linear.com/docs/30144  Cheers, Dave

[Altera_Forum]

--- Quote Start ---  You cannot easily use an FPGA to perform I2C level shifting, since it needs to act as a bridge (since there would be two different I2C buses), you're better off using devices like the LTC4313  http://www.linear.com/product/ltc4313  that page has a link to Linear Technologies other I2C buffers, i.e.,  http://www.linear.com/docs/30144  Cheers, Dave  --- Quote End ---    Thanks Dave for advice. I know it's NOT easy. Normally, I2C level shift is used for these condition. I just want try to remove this part from BOM. Any one has idea about it. Thanks!

[Altera_Forum]

With only FPGA hardware at your disposal you will have to design a state machine that decodes the I2C protocol, and from that finds out if the master is reading or writing. Then it can control the buffers in one direction or the other.