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I2c slave core for 7 bit slave address and 16 bit sub register address

NKuma10
Beginner
534 Views

Hi All,

 

I'm a newbie to Verilog, Can anyone please help me with ​implementing an i2c slave core for 7 bit slave address and 16 bit sub register address?

 

Thanks in advance.

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1 Reply
YuanLi_S_Intel
Employee
167 Views
Hi Naveen, Apologize that we do not help user to implement RTL code. However, if you have any question regarding to our FPGA and FPGA IP, you are always welcome to post a thread here. Regards, YL
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