Programmable Devices
CPLDs, FPGAs, SoC FPGAs, Configuration, and Transceivers
21324 Discussions

Ideas for my thesis using DE1-SoC development board and DSP Builder tool.

Altera_Forum
Honored Contributor II
‎10-08-2014 02:42 PM
1,353 Views

Hi, 

 

 

I am working in my master degree thesis using DE1-SoC development board. Now I am doing the user interface using a hard processor system (HPS ARM) with linux embedded to control a Terasic Multi-touch LCD module. 

I need some ideas to do some ip core in fpga such as digital signal processing for audio or communications, or other things. 

 

 

Thanks.
0 Kudos

Link Copied

1 Reply
Altera_Forum
Honored Contributor II
‎10-08-2014 03:18 PM
611 Views

Duplicate post: 

 

http://www.alteraforum.com/forum/showthread.php?t=46415
0 Kudos
Copy link
Reply

Community support is provided Monday to Friday. Other contact methods are available here.

Intel does not verify all solutions, including but not limited to any file transfers that may appear in this community. Accordingly, Intel disclaims all express and implied warranties, including without limitation, the implied warranties of merchantability, fitness for a particular purpose, and non-infringement, as well as any warranty arising from course of performance, course of dealing, or usage in trade.

For more complete information about compiler optimizations, see our Optimization Notice.