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Incremental compilation

Altera_Forum
Honored Contributor II
‎05-03-2009 03:14 AM
1,249 Views

I came across this warning: 

Warning: One or more LogicLock region membership assignments are unused 

.I have set the design partition and set the logiclock region size and location. 

while it still wasn't solved.
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Altera_Forum
Honored Contributor II
‎05-04-2009 06:39 AM
425 Views

 

--- Quote Start ---  

I came across this warning: 

Warning: One or more LogicLock region membership assignments are unused 

.I have set the design partition and set the logiclock region size and location. 

while it still wasn't solved. 

--- Quote End ---  

 

 

 

Hi, 

 

maybe some of your assigened nodes are optimized away by the Quartus synthesis. 

 

Kind regards 

 

GPK
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