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Internal Error during simulation of SOPC system in questa

Altera_Forum
Honored Contributor II
1,484 Views

Hi, 

 

I have just started using SOPC Builder. My system has 1 cpu, 1 sdram and 1 slave(multiplier). System generated without any error or warnings. 

But I just got stuck in simulation of my SOPC system (using questa). Although all the modules are compiled successfully, but shows an error on Loading the modules. 

 

.... 

........ 

vsim +nowarnTFMPC -t ps test_bench # ** Note: (vsim-3812) Design is being optimized...# ** Warning: ../cpu_0.v(2882): Connection width does not match width of port 'jdo'.# ** Warning: ../cpu_0.v(2550): Connection width does not match width of port 'address_b'.# ** Warning: [13] /home/cae/altera/quartus/eda/sim_lib/altera_mf.v(1947): Condition Coverage ignoring condition: too many inputs.# ** Warning: [13] ../multiplier_32_sopc.v(321): Condition Coverage ignoring this condition: unsupported infix operator# ** Warning: [13] /home/cae/altera/quartus/eda/sim_lib/altera_mf.v(44930): Condition Coverage ignoring this condition: unsupported variable type, not a scalar# ** Warning: [13] /home/cae/altera/quartus/eda/sim_lib/altera_mf.v(44930): Condition Coverage ignoring this condition: unsupported variable type, not a scalar# ** Warning: [13] /home/cae/altera/quartus/eda/sim_lib/altera_mf.v(44930): Condition Coverage ignoring this condition: unsupported variable type, not a scalar# ** Warning: [13] ../multiplier_32_sopc.v(2042): Condition Coverage ignoring this condition: unsupported infix operator# Loading work.test_bench(fast)# Loading work.ALTERA_DEVICE_FAMILIES(fast)# Loading work.ALTERA_MF_MEMORY_INITIALIZATION(fast)# Loading sv_std.std# Loading work.multiplier_ids(fast)# ** Warning: (vsim-3009) [TSCALE] - Module 'multiplier_ids' does not have a `timescale directive in effect, but previous modules do.# Region: /test_bench/DUT/the_multiplier_32_0/multiplier_32_0/instant_ids# ** Warning: (vsim-3009) [TSCALE] - Module 'avalon_widget' does not have a `timescale directive in effect, but previous modules do.# Region: /test_bench/DUT/the_multiplier_32_0/multiplier_32_0/instant_ids/avalon# Loading work.signed_mult(fast)# ** Warning: (vsim-3009) [TSCALE] - Module 'signed_mult' does not have a `timescale directive in effect, but previous modules do.# Region: /test_bench/DUT/the_multiplier_32_0/multiplier_32_0/inst# ** Warning: (vsim-3015) ../toplevel.v(36): [PCDPC] - Port size (32 or 32) does not match connection size (28) for port 'address'.# Region: /test_bench/DUT/the_multiplier_32_0/multiplier_32_0/instant_ids 

# Internal error in MergeMultipleMaps: uninitialized map number for inlined du (altera_std_synchronizer fast)# Internal error in MergeMultipleMaps: uninitialized map number for inlined du (altera_std_synchronizer fast) 

 

 

Can anyone help me on this issue. 

 

Thanks 

Sandeep
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Altera_Forum
Honored Contributor II
620 Views

its so sad that no one could reply to my question......... 

:confused:
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