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Internal M9K in power saving mode

Altera_Forum
Honored Contributor II
‎08-15-2015 09:42 PM
1,069 Views

Hello, is there such a thing? I see clockena input, but it seems to just enable or disable latching of the data/address/we lines on the clock signal transition, and there's no such thing as "chip select" for the M9K block. 

Device: Cyclone III.
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Altera_Forum
Honored Contributor II
‎08-16-2015 07:22 AM
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No there isn't. Fpgas don't have any chip enables on base components

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