Is the clock buffer needed for every clock generated by PLL?

[Altera_Forum]

I am working on ARRIA V FPGA and I have the following design that I need to implement: 

PLL has to generate 2 clocks : 62.5 and 12.5 MHz 1) My FPGA modules would be working at 62.5 MHz and I also need to send this clock to output clock pins. Do I need to use two clock buffers. i.e. external clock buffer for sending the clock to FPGA pins and regional clock buffer for clocking my internal modules.  2) 12.5 MHz clock is needed for clocking some moduels of FPGA for flash upgradation purposes. Do I need to place this clock into regional or global clock buffer?  Also is it required that all the PLL clocks need to be placed onto clock buffers before it can be used in our modules?  Please help

[Altera_Forum]

How are you capturing your design? You don't need to instantiate any buffers, Quartus will take care of this for you. 

 1) If you use your 62.5MHz clock internally, Quartus will connect up this PLL output clock to appropriate clock routing resource. This will include a suitable buffer. If you also connect up this PLL output to I/O pins then, again, the required buffer will be inserted. You don't need to specifically instantiate either buffer.  2) The same goes for your 12.5MHz clock. Quartus will route this onto regional or global clock routing resources, with any buffers required, as necessary.  Cheers, Alex

[Altera_Forum]

Thank you ALEX.  

If Quartus tool decides the buffers then what is the need for ALCLKCTRL core?

[Altera_Forum]

Arguably, there is no need for it (depending on your requirements). You certainly don't need one for an design to work. 

 As for what the ALTCLKCTRL core is for (straight from the user guide (https://www.altera.com/en_us/pdfs/literature/ug/ug_altclock.pdf)):  --- Quote Start ---  The common applications of using this megafunction are as follows: ■ Dynamic clock source selection ■ Dynamic power-down of a clock network  --- Quote End ---    Based on what you've written, I wouldn't expect you to need it.  Cheers, Alex

[Altera_Forum]

Thank you Alex for timely clarification

[Altera_Forum]

Agree with Alex, normally we would not need to add the ALTCLKCTRL buffer. QII will auto select the optimal clock network for you. In case you would like to specifically choose the clock network type, you can use ALTCLKCTRL to specify.