Programmable Devices
CPLDs, FPGAs, SoC FPGAs, Configuration, and Transceivers
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Is there a way to clear the Past status reg 1 and 2 in the registers so they come up the same way as a POR?

HMuld1
Beginner
‎01-31-2019 06:57 PM
1,033 Views

Power on reset clears the Read Past Status registers 1 and 2 as well as the Past Status 1 and 2 boot address registers in the altremote Update IP Core on the Cyclone 10 LP. Asserting nconfig does not clear these registers.

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SreekumarR_G_Intel
Employee
‎03-15-2019 04:43 AM
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Hello Henry, Sorry...i just noticed i missed your case ..when we (intel) migrated to different tool few days i didnt get notification of cases. Apologize for delay in response from my side . In clyone 10 LP device there is optional chip wide reset that enables to overrides all the device registers , here is the link for more detailed information. https://www.intel.com/content/www/us/en/programmable/documentation/dbl1490702915634.html thank you , Regards, Sree
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