Programmable Devices
CPLDs, FPGAs, SoC FPGAs, Configuration, and Transceivers
20248 Discussions

Is there a way to clear the Past status reg 1 and 2 in the registers so they come up the same way as a POR?

HMuld1
Beginner
‎01-31-2019 06:57 PM
933 Views

Power on reset clears the Read Past Status registers 1 and 2 as well as the Past Status 1 and 2 boot address registers in the altremote Update IP Core on the Cyclone 10 LP. Asserting nconfig does not clear these registers.

0 Kudos

Link Copied

1 Reply
SreekumarR_G_Intel
Employee
‎03-15-2019 04:43 AM
145 Views
Hello Henry, Sorry...i just noticed i missed your case ..when we (intel) migrated to different tool few days i didnt get notification of cases. Apologize for delay in response from my side . In clyone 10 LP device there is optional chip wide reset that enables to overrides all the device registers , here is the link for more detailed information. https://www.intel.com/content/www/us/en/programmable/documentation/dbl1490702915634.html thank you , Regards, Sree
0 Kudos
Copy link
Reply

Community support is provided during standard business hours (Monday to Friday 7AM - 5PM PST). Other contact methods are available here.

Intel does not verify all solutions, including but not limited to any file transfers that may appear in this community. Accordingly, Intel disclaims all express and implied warranties, including without limitation, the implied warranties of merchantability, fitness for a particular purpose, and non-infringement, as well as any warranty arising from course of performance, course of dealing, or usage in trade.

For more complete information about compiler optimizations, see our Optimization Notice.