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Hi there, I'm working with the Cyclone V and have the constraint that im only able to use the 9x9 multipliers in the variable precision DSP blocks.
The design im trying to synthesize is something along the lines of what is shown below (a small section of the datapath of a larger design).
This block has two 8-bit multipliers and two 8-bit adders. As per the cyclone V device handbook, each variable precision DSP block can be configured as 3x 9x9 multipliers
I should therefore be able to synthesize the previous design using one DSP block containing the two 8-bit multiplications. Upon synthesis however, I see:
Looking at the DSP fitter summary we see that it has been synthesized to one independent 9x9 and two independent 18x18 multipliers, not what is intended.
So we now look at the post fitting RTL viewer, one of the multipliers is as expected:
The second is not as expected:
we can see that an additional superfluous multiplier is inferred - which has an output which is not even used! And, its using the 18x18 multiplier to produce an 8-bit output - it makes no sense.
My RTL code used here is nothing but a combinatorial multiplier as follows
```
Interested to hear if there is a solution to this - remember, I'd only like to use the 9x9 blocks, not 18x18.
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Hi,
Can you please share the below details.
1) Which Operating system you are using?
2) Which Quartus Software version you are using?
3) Which device(OPN) you are targeting?
Thank you
Kshitij Goel
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seeing 18x18 multiplier in post-fit design doesn't tell much about the capability of implementing your design with 9x9 only, I think. Post fit represents an optimization of a given design with available resources, not necessary the implementation with minimal resources.
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Hi,
Can you please share your project with below details.
1) Which Operating system you are using?
2) Which Quartus Software version you are using?
3) Which device(OPN) you are targeting?
Thank you
Kshitij Goel
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Hi,
Please use the ini.
opt_dsp_promote_9x9=on
It should resolve your issue.
Thank you
Kshitij Goel
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Hi,
As we do not receive any response from you on the previous answer that we have provided. Please login to ‘https://supporttickets.intel.com’, view details of the desire request, and post a response within the next 15 days to allow me to continue to support you. After 15 days, this thread will be transitioned to community support. The community users will be able to help you on your follow-up questions.
Thank you
Kshitij Goel
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Hi,
Please use this ini:
opt_dsp_promote_9x9=on
To make use of dense 9x9 mode and so will have different preferences from the normal flow. Unfortunately there's no QSF control for it, so ini is the best option.
Thank you
Kshitij Goel
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Hi,
As we do not receive any response from you on the previous answer that we have provided. Please login to ‘https://supporttickets.intel.com’, view details of the desire request, and post a response within the next 15 days to allow me to continue to support you. After 15 days, this thread will be transitioned to community support. The community users will be able to help you on your follow-up questions.
Thank you
Kshitij Goel

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