Is there any way to pre-load the Altera DDR3 (Uniphy) Memory Model?

[Altera_Forum]

Hi - to speed simulation, I'd like to pre-load the memory with data. There is surprisingly little documentation that I can find on the Altera Memory Model. Can anyone point me in the right direction here? 

 thanks /j

[Altera_Forum]

On-chip or off-chip memory? 

 On-chip memory can be initialised using a .mif or .hex file, specified when you create the memory in the MegaWizard Plug-In Manager. These files can be used both in the FPGA and for simulation. However, ModelSim expects these files to be located in a particular location which is different to the default location you're likely to chose when creating the memory.  Off-chip memory can be initialised but will have to be done in whatever rtl model you're using.  Regards, Alex

[Altera_Forum]

Hi,  

In case you're using off-chip memory and use Qsys you can use the External memory BFM discussed in Section V, chapter 3 of http://www.altera.com/literature/ug/ug_avalon_verification_ip.pdf. I understand that this is not what you asked for in the first place, documentation about the Altera Memory Models does indeed seem to be sparse...  Cheers

[Altera_Forum]

Thanks for the data Alex. I was referring specifically to the Altera DDR3 (Uniphy) Memory Model, which is a model of external memory instantiated via Qsys to simulate off chip memory to simulate the Altera DDR3 Uniphy Controller. This model is written in system verilog and although I've identified the array it doesn't show up in Modelsim and so there must be some trick to pre-loading it.

[Altera_Forum]

--- Quote Start ---  This model is written in system verilog and although I've identified the array it doesn't show up in Modelsim and so there must be some trick to pre-loading it.  --- Quote End ---    The array is there, it just might not look how you might have expected it to look :)  The 'mem_data' is a System Verilog associative array which means it is sparsely populated. Within ModelSim "Memory List" window, it is only going to have a size corresponding to the elements which have been populated (memory data written into them). So when you first start the testbench, it has size zero instead of e.g. 128M filled with x's if you're familiar with an older SDRAM model.  The Altera models have "MEM_INIT_EN" and "MEM_INIT_FILE" parameters that you can use to have the SystemVerilog execute loops to load that data from a file. You just need to modify the generated files to set MEM_INIT_EN=1 and supply a valid file.  Or, you can leave those parameters as-is (MEM_INIT_EN=0) and then at an appropriate time with your testbench execution, you can use the ModelSim "mem load" command to change the contents of the array.  For example,   VSIM> cat x.mem # // memory data file (do not edit the following line - required for mem load use) # // instance=/x_tb/x_inst/mem_if_ddr3_mem_model_0/depth_gen/width_gen/mem_inst/rank_gen/rank_inst/mem_data # // format=mti addressradix=h dataradix=s version=1.0 wordsperline=1 # 0: 11101111 # 1: 10111110 # 2: 10101101 # 3: 11011110 # 2048: 11101111 # 2049: 10111110 # 204a: 10101101 # 204b: 11011110 # # 5555: 11101111 # VSIM> mem load -i x.mem {/x_tb/x_inst/mem_if_ddr3_mem_model_0/depth_gen/width_gen/mem_inst/rank_gen/rank_inst/mem_data} VSIM> mem display -addressradix hex {/x_tb/x_inst/mem_if_ddr3_mem_model_0/depth_gen/width_gen/mem_inst/rank_gen/rank_inst/mem_data} # 0: 11101111 # 1: 10111110 # 2: 10101101 # 3: 11011110 # 2048: 11101111 # 2049: 10111110 # 204a: 10101101 # 204b: 11011110 # 5555: 11101111

[Altera_Forum]

Thanks -  

1) what's the format of the "x.mem" file? 2) can I call the "mem load" from inside my verilog testbench?  /j

[Altera_Forum]

--- Quote Start ---   1) what's the format of the "x.mem" file?   --- Quote End ---   My example was MTI    --- Quote Start ---   2) can I call the "mem load" from inside my verilog testbench?   --- Quote End ---    No; it is a modelsim (TCL) command. It's described on page 166 of the modelsim reference manual that I am looking at. (ModelSim: Help -> PDF Documentation -> Reference Manual)

[Altera_Forum]

1) "my example was MTI" 

I'm sure it was. But is it a verilog $memreadh file? a .mif file? a .hex file? or ??? (I don't know what .mem refers to). Thanks!  2) ok - thanks

[Altera_Forum]

--- Quote Start ---  1) "my example was MTI" I'm sure it was. But is it a verilog $memreadh file? a .mif file? a .hex file? or ??? (I don't know what .mem refers to). Thanks!   --- Quote End ---    My example x.mem file was in MTI file format. It was not $memreadh, .mif, or .hex. It was MTI.  See the reference manual to learn what other file formats are available for that command.

[Altera_Forum]

ok, thanks