I have a board with 2 x 10M04DCF256 devices on it. The JTAG chain is wired up serially (TDO from device 1 goes to TDI of device 2). The chain is fully functional. Here is the observed behavior:
The above behavior is 100% consistent. If I do the same experiments again, I get the same results.
I suspect some sort of issue either with generation of the jbc file, or with the code that plays the jbc file, specifically with a multiple Intel-FPGA device chain.
We have implemented numerous other boards with single devices on the chain, and this always works fine.
So, I am looking for some guidance on how to resolve this issue.
I think this one is known issue (JAM/JBC file generation).
The issue is caused by Quartus Prime update version.
We will update the new KDB for this issue in near future. And this bug is scheduled to be fixed in a future release of the Intel Quartus Prime software.
In the meantime, please refer to the attachment picture for workaround:
I hope this will help
I am using Quartus version 18.1 Lite. I used your suggestion (check the Enable real-time ISP...) and generated a combined jbc file. The result was successful, now both FPGAs get configured when we execute that .jbc file using altera Stapl code on our embedded system.
Thank you for your help.