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JRunner and Design Security

Altera_Forum
Honored Contributor II
‎06-27-2012 08:08 AM
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I have Cyclone III EP3CLS70F484C8N and ARM MCU on my board. I need to program volatile key into FPGA. It can be done only over JTAG. So I try to implement JTAG in ARM. I use JRunner for this purpose. But it don't include FACTORY, KEY_CLR_VREG and KEY_PROG_VOL JTAG instructions. I added this inst. into JRunner. I program my 512-bit key, make POR and then start to conf. by PS and have error. If I program key with Quartus, 

PS configuration ends successful. 

I read many Altera documents, but can't completely find out how to program volatile key and verify programming. 

Please tell me good documentation or another advices to solve this problem. 

P.S. Sorry for errors.
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