JTAG & AS configuration

[Altera_Forum]

Hello community, 

 I've a basic problem (I think for you...) in programming a serial configuration device (EPCS16 & EP2C50) using JTAG interface.  I'm using the following scheme : combining JTAG & AS configuration (figure 13-25 of Cyclone II Device Handbook, Volume 1, chapt 13-63)  When I use this scheme, I can successfully program a JIC file.  But if I add other JTAG device (FPGA Xilinx) in JTAG chain, I got an error when programming the JIC file : Operation on ASP configuration device(s) fails -- JTAG chains contains unknown device However the auto detect fonction show the correct number of device in chain, but with unknown device mention.   Maybe this schematic is not correct to program my EPCS16 in multiple FPGA JTAG chain ?  Any ideas will help me ! Thanks   EDIT : I attached my jtag chain, and the error message

[Altera_Forum]

Maybe my problem is not clear, you need more info ? 

Nobody can help me ?

[Altera_Forum]

The problem is pretty clear in my opinion. The question is, if the Quartus programmer is managing indirect JTAG programming in a mixed device chain correctly? I think it should, but I'm not able to check it now.  

 Did you already try other virtual JTAG instances, e.g. SignalTap II or Source&Probe? According to my experience, it may be the case, that basic JTAG device configuration works well, but virtual JTAG variants don't due to signal quality problems of the JTAG chain (ringing TCK).

[Altera_Forum]

Hi FvM, 

 Thank you for your answer.    --- Quote Start ---  Did you already try other virtual JTAG instances  --- Quote End ---  No, I'm ALTERA beginner and I don't know these functions ! If you know quick test that I can do, let me know.    --- Quote Start ---  JTAG variants don't due to signal quality problems of the JTAG chain (ringing TCK)  --- Quote End ---  I just check the JTAG signals integrity with scope, TCK is clean and is in phase with data.  It seems that ALTERA programmer successfully configure my EP2C50 but got error when trying to program the flash memory device (EPCS16).

[Altera_Forum]

I can't access via JTAG to others Xilinx FPGA with my probe. Just JTAG detection chain is OK, access to specific FPGA isn't functionning. 

 All FPGA are on daugther card (one by card), and if I swap the Altera one by a Xilinx one, it's OK (4 x Xilinx in chain). And the Altera one is functionning alone. I can't test severals Altera in same chain because I got only one.   It seems not possible to mix device in same chain in this configuration. But I would like a confirmation by an expert, maybe there is a solution ?

[Altera_Forum]

Hi, 

 I had a similar problem when I constructed a chain with four Phys. The solution was to get the *.bsdl File for the Phy. You should see the unknown devices in the chain I think. If you klick with the right button on one of them choose change device. In the popup-box you can import the *.bsdl files from Xilinx. I hope this helps you out.

[Altera_Forum]

Hi JacoL, 

   --- Quote Start ---  I hope this helps you out.  --- Quote End ---  You're right :) I've done exactly what you said, and it's working fine ! I've attached .bsdl file for each "unknown device" in JTAG chain, then I can program my EP2C50 & EPCS16 successfully !  Many thanks JacoL ! Bye

[Altera_Forum]

The problem is, that to perform other JTAG instructions than default IDCODE scan, the instruction register length of individual devices in the chain must be known. The usual method is to get it from a device description file, although I think it would be able by trial.