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Konvert a Vhdl File

Altera_Forum
Honored Contributor II
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Hello 

I'd Like to ask if it's possiple to observe the Logic Hardware Configuration from a VHDL File 

Thanks  

Nadja 

:confused: :confused: :confused:
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Altera_Forum
Honored Contributor II
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App Note 379 provides a reference design that can be used to read/write/erase data (including configuration data) stored in an active serial prom (EPCS1, EPCS4, ... , EPCS64). There is a pdf that documents the design and a zip that provdes source: 

 

http://www.altera.com/literature/an/an379.pdf 

http://www.altera.com/literature/an/an379.zip 

 

This design could be instantiated in a VHDL design.  

 

There is no documented way to directly read the SRAM configuration bits once they are loaded into the FPGA.
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Altera_Forum
Honored Contributor II
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Please try rephrasing your question as I connot quite understand what you are really asking to be able to do.

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