Linux not Booting on custom Intel Cyclone V board

[akashgupta]

Hello,

I was trying to build Linux file system from scratch for my custom Intel Cyclone V (5CSXFC6C6) board so I followed this (Embedded Linux Beginners Guide | Documentation | RocketBoards.org) guide. But it did not work out and I got a "Reset the board" error. I am using Ubuntu 18.04 and Quartus Prime Standard 18.1 edition.

Then, I tried the same procedure on Arrow SoCkit Evaluation Board 5CSXFC6D6F31C6N. The guide was accurate till step 8 (I wrote the preloader and u-boot.img on sd card and it gave the same output and errors of zImage as suggested in the guide) but since “rel_socfpga-4.1_15.09.01_pr” release is no more available for linux-socfpga from Altera, I had to opt for a newer version of linux-socfpga.

Now, newer versions of linux-socfpga do not support compilation using old “gcc-linaro-arm-linux-gnueabihf-4.9-2014.09_linux” as suggested in the beginners guide, so I had to opt for a newer “gcc-linaro-6.5.0-2018.12-x86_64_arm-linux-gnueabihf”. I further used “socfpga-5.15.50-lts” as the new and stable version of linux-socfpga for cyclone-v and buildroot to build the image but it also didn’t work out and u-boot output threw errors for commands like "fatload" command not used properly and "echo $fpgadata" was empty).

I tried another way (Building Bootloader for Cyclone V and Arria 10 | Documentation | RocketBoards.org 1) with Quartus 19.1 but it failed at bitbake step. It gave 2 errors after downloading 5+ GBs of data. I am stuck with this for more than 2 months.

Can anyone suggest a better way to build things for my custom board from scratch? All the guides available are specific to some software or hardware and none of them have resulted working linux kernel for me.

Note- Arrow SoCkit works fine when I load prebuilt image, which means all the hardware, sd card and switches are set correctly.

[mabdrahi]

Hi Akash,

I notice that India have public holiday until 26, i will touch you back.

Thank you,

Aliff

[mabdrahi]

Hi Akash,

Let me know if you back from holiday,

Thank you,

Aliff

[akashgupta]

Hi, I am back to work. I am trying to compile recording of commands as requested by you.

Meanwhile, I tried preparing sdcard using the u-boot-with-spl.sfp you have provided in the qspi zip and it didn't work. I request you to please describe all the pins and switch configurations for the Arrow SoCkit. I am using Rev D of ArrowSoCKitEvaluationBoard this board. Please check the board and make sure we are using same hardware. 

I also request you to burn the image I have provided in the previous reply and tell me if it works for you.

Thanks, 

Akash.

[mabdrahi]

Hi Akash,

Thank you for the update. I'll test your image on our hardware, but I've discovered faulty on

my board. I'm currently looking for a replacement board for the image you provided.

Thank you,

Aliff 

[akashgupta]

Hi,

I have recorded the video of complete procedure. Please download from link and cross check it for the errors. I had kept all the files downloaded already to save time. 

The files generated through this video are also attached as output_files.zip in this reply.

Regards,

Akash.

[akashgupta]

Hi, Please find the photos of the dev board I am using for your reference.

[mabdrahi]

Hi Akash

[mabdrahi]

Hi Akash,

Please ignore my last comment.

I get my board back and test your image.

Apologize for the inconvenience.

Thank you,

Aliff

[mabdrahi]

Hi Akash,

Apologizes for my end. My board have issue and I dont have any option to test your sdcard image. but i have compile my sdcard image to let you test it.

Please find the attachment.

Thank you,

Aliff. 

[akashgupta]

Hi,

I burned your image on the sd card and tried booting up but it also resulted the blank screen as before.

I have 2 boards and tried the image on both boards so hardware fault is less likely. Since the guide we are following does not dictate the precise pin and jumper configuration for SoCkit, I request you to check for the pin configuration. 

Thanks,

Akash.

[mabdrahi]

Hi Akash,

Any update from image given by my college (Jeetesh)?

you check in mail.

Thank you,

Aliff

[akashgupta]

Hi, 

I guess, there is some technical issue and I could not get the image sent by Jeetesh. We are in touch and I will post once I get the image.

Regards,

Akash.

[mabdrahi]

Hi Akash,

Are you get the image?

Thank you,

Aliff

[akashgupta]

Hi,

I had got the image on 10.11.23 and discussed the details and log with Jeetesh over call. The discussion is still going on.

Regards,

Akash Gupta.

[mabdrahi]

Hi Akash,

Can I set to close pending this case and will open when you get the result?

Thank you,

Aliff

[akashgupta]

Hi Aliff,

Yes, you can close this case and we will continue to discuss over email.

Thanks,

Akash.

[mabdrahi]

Hi Akash,

I copy the email thread from our college to here for better community understanding.

########################### EMAIL THREAD ####################################

As discussed on phone, I followed the steps till "make -j 48" command. I am attaching the tree log of u-boot-socfpga folder for your reference. The qar project is updated with 4 bit sd card peripheral. 

Regards,

Akash.

From: "jeetesh kumar tiwari" <jeetesh.kumar.tiwari@intel.com>

To: "Akash Gupta" <AKASH.DEAL@GOV.IN>

Cc: "JS HYANKI" <js.hyanki.deal@gov.in>

Sent: Friday, December 1, 2023 8:18:03 AM

Subject: RE: Altera Cyclone V SoC development kit-Ready Linux Images

Hi Akash,

We can have call today.

Last two days I was quiet busy with Intel IFTD event in Bangalore.

Regards

Jeetesh

From: Akash Gupta <akash.deal@gov.in>

Sent: Wednesday, November 29, 2023 12:43 PM

To: Tiwari, Jeetesh Kumar <jeetesh.kumar.tiwari@intel.com>

Cc: JS HYANKI <js.hyanki.deal@gov.in>

Subject: Re: Altera Cyclone V SoC development kit-Ready Linux Images

Hi,

I used the same project and compiled it in Quartus Prime 18.1 and then followed this guide (which uses an old u-boot) to generate the preloader-mkpimage.bin, which I wrote as a preloader in a2 partition of sdcard. In addition, I wrote "hello-mkimage.bin" (a simple DS-5 project to display hello world over bare metal) as bootloader. Now the custom board boots up properly and log shows that SDRAM is detected. 

The problem is that, after reset, sometimes the output showa complete "Hello World!" phrase, but other times it shows "He" or "He▒lo World!" (including a corrupted letter) or nothing. It is totally random in nature. I am attaching both logs for your reference. We programmed the board using sof also for testing but there is no change in the nature of output. If there had been a hardware problem or RAM was not configured properly in quartus project, this preloader would not have been able to detect the RAM. Please go through the logs. You can call me at 2 PM today if you are available, otherwise convey your suitable timings.

---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------

About the linux booting using Quartus 22 as you and I were doing earlier, we had made few changes in the hardware and using the same project and method, now the error is changed to following:

U-Boot SPL 2022.04-gfda0d917-dirty (Nov 22 2023 - 14:12:39 +0530)

Trying to boot from MMC1

unable to select a mode

spl: mmc init failed with error: -524

SPL: failed to boot from all boot devices

### ERROR ### Please RESET the board ###

Earlier, it used to show "spl: partition error", but now it show "unable to select a mode."

Regards,

Akash.

From: "jeetesh kumar tiwari" <jeetesh.kumar.tiwari@intel.com>

To: "Akash Gupta" <AKASH.DEAL@GOV.IN>

Cc: "JS HYANKI" <js.hyanki.deal@gov.in>

Sent: Tuesday, November 28, 2023 12:03:05 PM

Subject: RE: Altera Cyclone V SoC development kit-Ready Linux Images

Hi Akash,

As discussed over the phone, I am getting the error while compilation. It looks DDR issue.

Please send the quartus 18 version project which you have tested with baremetal.

Regards

Jeetesh

From: Akash Gupta <akash.deal@gov.in>

Sent: Tuesday, November 21, 2023 10:17 AM

To: Tiwari, Jeetesh Kumar <jeetesh.kumar.tiwari@intel.com>

Cc: JS HYANKI <js.hyanki.deal@gov.in>

Subject: Re: Altera Cyclone V SoC development kit-Ready Linux Images

Hi,

Please find attached the project and error screenshot. The project was compiled using Quartus Prime 22. I have removed the "output_files" and "software" (for size purpose) folders as you will compile it again.

Regards,

Akash.

From: "jeetesh kumar tiwari" <jeetesh.kumar.tiwari@intel.com>

To: "Akash Gupta" <AKASH.DEAL@GOV.IN>

Cc: "JS HYANKI" <js.hyanki.deal@gov.in>

Sent: Tuesday, November 21, 2023 4:43:18 AM

Subject: RE: Altera Cyclone V SoC development kit-Ready Linux Images

Hi Akash,

As discussed over phone, please send the quartus project so that we can also check our side.

Regards

Jeetesh

From: Tiwari, Jeetesh Kumar

Sent: Monday, November 20, 2023 12:17 PM

To: Akash Gupta <akash.deal@gov.in>

Cc: JS HYANKI <js.hyanki.deal@gov.in>

Subject: RE: Altera Cyclone V SoC development kit-Ready Linux Images

Hi Akash,

We can have call today at 2:30PM.

Regards

Jeetesh

-----Original Message-----

From: Akash Gupta <akash.deal@gov.in>

Sent: Monday, November 20, 2023 11:43 AM

To: Tiwari, Jeetesh Kumar <jeetesh.kumar.tiwari@intel.com>

Cc: JS HYANKI <js.hyanki.deal@gov.in>

Subject: RE: Altera Cyclone V SoC development kit-Ready Linux Images

Hi,

I and Hyanki sir wanted to discuss a few things with you regarding design of custom cyclone v board. Please tell when you are available for a call.

Regards,

Akash.

----- Original Message -----

From: Akash Gupta <akash.deal@gov.in>

To: jeetesh kumar tiwari <jeetesh.kumar.tiwari@intel.com>

Cc: JS HYANKI <js.hyanki.deal@gov.in>

Sent: Fri, 10 Nov 2023 17:55:29 +0530 (IST)

Subject: RE: Altera Cyclone V SoC development kit-Ready Linux Images

Hi,

The board does not hang on the said line. It restarts automatically. The log I've attached is without any keyboard input or power button press.

I am using putty on Ubuntu 18.04.

Regards,

Akash.

----- Original Message -----

From: jeetesh kumar tiwari <jeetesh.kumar.tiwari@intel.com>

To: Akash Gupta <AKASH.DEAL@GOV.IN>

Cc: JS HYANKI <js.hyanki.deal@gov.in>

Sent: Fri, 10 Nov 2023 15:17:07 +0530 (IST)

Subject: RE: Altera Cyclone V SoC development kit-Ready Linux Images

Hi Akash,

Is your board automatically restarted or stopping in between and is it hanging at “[   1.542258] Synopsys Designware Multimedia Card Interface Driver”.

My side this same image is working fine on Altera Cyclone V SoC kit. Log Attached in email.

Also, Which serial terminal you are using e.g. putty or Hercules or any other utility.

Regards

Jeetesh

From: Akash Gupta <akash.deal@gov.in>

Sent: Friday, November 10, 2023 2:11 PM

To: Tiwari, Jeetesh Kumar <jeetesh.kumar.tiwari@intel.com>

Cc: JS HYANKI <js.hyanki.deal@gov.in>

Subject: Re: Altera Cyclone V SoC development kit-Ready Linux Images

Hi Jeetesh,

Thanks for the image. I was able to boot linux on Altera SoCDK but it seems to stuck in a loop for me. For setting up the board pin config, I followed this link.<https://www.rocketboards.org/foswiki/Documentation/AlteraSoCDevelopmentBoardSoftwareGettingStarted>

As it seems, the boot processes is stuck in a loop. I have attached the log from my putty terminal. I will try for custom board later this week, and will update you by 17.10.23.

Regards,

Akash Gupta.

________________________________

From: "jeetesh kumar tiwari" <jeetesh.kumar.tiwari@intel.com<mailto:jeetesh.kumar.tiwari@intel.com>>

To: "Akash Gupta" <AKASH.DEAL@GOV.IN<mailto:AKASH.DEAL@GOV.IN>>

Sent: Friday, November 10, 2023 10:49:46 AM

Subject: Altera Cyclone V SoC development kit-Ready Linux Images

Hi Akash,

As discussed over phone, please download the files from the below shared details- Secureftp.intel.com - Sign In - FileTransferWebUI<https://secureftp.intel.com/secureftp>

Username: tmp04946

Password: Akash@123

Host Name: secureftp.intel.com

Server/Protocol Type: FTP/SSL (AUTH_SSL, AUTH_TLS, or Explicit SSL/TLS)

Mode: Passive

Port: 21

Let us know if you are able to download.

Regards

Jeetesh

--

Akash Gupta,

Sc-B, DEAL (DRDO)

Raipur Road, Dehradun - 248001 (INDIA)

+91 (135) 222 3016 | akash.deal@gov.in

--

Akash Gupta,

Sc-B, DEAL (DRDO)

Raipur Road, Dehradun - 248001 (INDIA)

+91 (135) 222 3016 | akash.deal@gov.in

--

Akash Gupta,

Sc-B, DEAL (DRDO)

Raipur Road, Dehradun - 248001 (INDIA)

+91 (135) 222 3016 | akash.deal@gov.in

[mabdrahi]

Hi Akash,

Can you post your result here?

Thank you,

Aliff

[akashgupta]

Hi,

As partial result, I can post the following points:

1.  BuildingBootloaderCycloneV  precisely describes the latest method for bulding complete bootloader with linux filesystem for ALTERA SoC Developement kit. The design fetched and compiled using "make generate_from_tcl" is targetting ALTERA SoC Dev Kit Board. Set boot pins accordingly.
2. For Arrow SoC Dev Kit, download the latest ghrd design from here and compile it using Quartus Prime 22.1 as described in BuildingBootloaderCycloneV . Just the design and compilation needs to be changed for this method to work on ARROW SoC Dev Kit. Rest all things remain same. Set boot pins accordingly as described for this particular board.
3. For custom board, I am not yet successful as my design is having some mmc issue, resolution of which is in process. (It is not limited to the 4 bit/ 8 bit issue as you had posted on the thread earlier as after chaging this parameter to 4 bit, it still results in error.) I can assure that if the pin config and hard processing system (HPS) configuration is done properly in the Quartus Prime design, the method suggested  in BuildingBootloaderCycloneV is apt for building the bootloader and filesystem. I am not yet sure how the rbf file will be pushed for custom board as I feel it should be from sopcinfo > dtc > dtb method, but the system also runs with cyclone5_socdk.dtb provided in u-boot-socfpga folder.
4. Bonus point a) In BuildingBootloaderCycloneV , at "B. Build U-Boot" section, the first command (cd $TOP_FOLDER/cv_soc_devkit) is little bit incorrect. The correct version is "cd $TOP_FOLDER/cv_soc_devkit_ghrd".
5. Bonus point b) While running "bitbake core-image-minimal", it may download upto 5 GBs of data and the folder may expand upto a size of 120 GB and resulting in a error after 1 hour or so, hence a failed process. Rerunning the command may fix the issue. To prevent downloading these again, we can copy the files from "ROOTFS_TOP/build/downloads" folder and paste them in the same location if we need to rerun the process for same or other project.

[mabdrahi]

Hi Akash,

Im not geting the update from your discussion with jeetesh.

Can you include me into the email loop?

Thank ypu,

Aliff

[akashgupta]

Hi,
There has not been any significant progress afterwards. I will update if something is worth posting.

Regards,
Akash.