Loading Pin Assignments

[Altera_Forum]

Does anyone know how to load pin assignments from a .xls spread sheet into Quatrus II? I know it can be done, I've seen it done, but can't remember how it was done.:cool:  

 Thank you in advanced.  ~Mark T. B.

[Altera_Forum]

Hello, 

 most simple way is to copy the assignments to project *.qsf file, e. g. set_location_assignment pin_30 -to xclk. To add the assignments to a loaded project, you could use a Tcl script.  Regards,  Frank

[Altera_Forum]

Thank you very much.

[Altera_Forum]

If you have the fields (columns) formatted correctly in Excel, save as .csv then you can use Assignments-> Import Assignments menu to load the .csv file in Quartus.

[Altera_Forum]

I'm fairly new to FPGA design and am trying to start a design from scratch. I've looked through example .tcl files that are used to load pin assignments into a project, but have not yet found where the pin names are defined. I have seen text/pdf/html files on the Altera website that list the physical pin designations for each device, but I haven't yet seen where the logical pin name is defined. Using the example in the previous post, where is the name XCLK defined? I've seen something like this listed in example .tcl files as 

 set_location_assignment pin_b13 -to clk_in    and was looking for where PIN_B13 and the other "Official" logical pin names were defined for a particular part.   Thanks very much for taking time to respond.

[Altera_Forum]

I don't understand what you mean with logical pin name. Quartus uses basically physical pin names according to the used package, e. g. pin_30 for a QFP as in my example or pin_b15 for a BGA-package. I wonder where you may have seen an assignment as  

 set_location_assignment -to pin_xclk external_clock?   Apart from location assignments, logical names for pin groups and clock assignments can be used optionally.

[Altera_Forum]

I found two examples from the web that I thought I would share on the CSV format. IMO the CSV format is the easiest format to generate when you already have a list of pin assignments. I realize the QSF probably is good for some things, but its seems like an overly wordy format for pin assignments. And any Alteraians reading this=> Add a few lines of examples in the help file would be really helpful. 

 EXAMPLE1:  To,Location dataa[0],PIN_D3 dataa[1],PIN_C2 dataa[2],PIN_D2 dataa[3],PIN_D1 dataa[4],PIN_G6 dataa[5],PIN_G5 dataa[6],PIN_E3 dataa[7],PIN_F3 datab[0],PIN_J3 datab[1],PIN_G2 datab[2],PIN_G1 datab[3],PIN_K2 datab[4],PIN_K1 datab[5],PIN_K4 datab[6],PIN_K3 datab[7],PIN_L4 rdaddress[0],PIN_E1 rdaddress[1],PIN_F2 rdaddress[2],PIN_F1 rdaddress[3],PIN_H5 rdaddress[4],PIN_J4 wraddress[0],PIN_H6 wraddress[1],PIN_G4 wraddress[2],PIN_G3 wraddress[3],PIN_H4 wraddress[4],PIN_H3 wren,PIN_F5  EXAMPLE2: From,To,Assignment Name,Value,Enabled *,adsc_n_to_the_ext_ssram,tco Requirement,3.3 ns,Yes *,bwe_n_to_the_ext_ssram,tco Requirement,3.3 ns,Yes *,chipenable1_n_to_the_ext_ssram,tco Requirement,3.3 ns,Yes *,ext_ssram_bus_data,tco Requirement,3.3 ns,Yes *,ext_ssram_bus_data,tsu Requirement,6 ns,Yes *,outputenable_n_to_the_ext_ssram,tco Requirement,3.3 ns,Yes *,ext_ssram_bus_address,tco Requirement,3.3 ns,Yes *,bw_n_to_the_ext_ssram,tco Requirement,3.3 ns,Yes ,ext_ssram_bus_address[2],Location,PIN_G5,Yes ,ext_ssram_bus_address[3],Location,PIN_G6,Yes ,ext_ssram_bus_address[4],Location,PIN_C2,Yes ,ext_ssram_bus_address[5],Location,PIN_C3,Yes ,ext_ssram_bus_address[6],Location,PIN_B2,Yes ,ext_ssram_bus_address[7],Location,PIN_B3,Yes ,ext_ssram_bus_address[8],Location,PIN_L9,Yes ,ext_ssram_bus_address[9],Location,PIN_F7,Yes