Looking at gate signals inside a block

[Altera_Forum]

So the problem is that I have a top level block diagram and I can of course make pins and check the inputs and outputs of the blocks when I do the simulation after compiling the design and making a vector waveform file. 

The problem is that just How can I check the signals inside the blocks?  If I have not connected an input/output pin to suppose an a D flip flop called inst6 inside a block, how do I check its value without attaching a pin to it?  The only thing is that adding pins makes the diagram messy. I want to see how the value of all the gates, flip flops is changing with time in the different blocks but don't want to add pins to them.

[Altera_Forum]

The easiest way to do this is use HDL instead of block diagrams and use Modelsim - you have full access to monitor all signals.

[Altera_Forum]

Hello, 

What about change the filter option in the node finder of the vector wafeform file:  pins: all pins: all and register postfitting ... design entry all names.  good luck.