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Low Voltage Input

Altera_Forum
Honored Contributor II
‎12-03-2010 01:01 PM
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Hi! 

 

I want to feed an SDI Signal with a maximum high level of 800mV into an ALTERA CYCLONEII. 

Unfortunatly the FPGA does not recognize this low voltage in my project. 

Is there an option, maybe with the appropriate I/O assignment, where I can tell the FPGA to handle this input? 

 

Thanks for your help. 

 

Best regards 

drehstrom
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Altera_Forum
Honored Contributor II
‎12-03-2010 02:05 PM
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Can you describe the source of that SDI signal? And what 'stream of data' if any does it represent?

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Altera_Forum
Honored Contributor II
‎12-03-2010 08:26 PM
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Cyclone II differential LVDS inputs have a specified common mode voltage of 0.1 to 2.0V. Thus they should be able to receive a 0.8V signal with the negative input connected to a reference voltage of e.g. 0.4 V.

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