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Altera_Forum
Honored Contributor I
1,283 Views

MAX 10 FPGA Program File

Hi, 

for my first project with FPGA I am using MAX 10M08 EQFP144 and USB Blaster as Programmer Tool.  

Now, if I program the device with the .sof file the FPGA works correctely, whereas if I use .pof file the device doesn't work unless I heat the device until 40/45 Celsius Degrees.  

In another pcb if I program the device with .pof file all works correctely but if I restart the device at low temperature the device doesn't work unless I heat the device. 

Do you have any suggest? 

Thanks 

Best regards 

Enrico
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7 Replies
Altera_Forum
Honored Contributor I
67 Views

Hi Enrico,  

 

Are you using custom board/development board? 

 

Best Regards, 

Anand Raj Shankar 

(This message was posted on behalf of Intel Corporation)
Altera_Forum
Honored Contributor I
67 Views

Hello Anand, 

 

I am also having a problem when trying to configure (JTAG) the Max 10 (10M08 UBGA-169) device. Pl see my today's comment in this thread.. 

 

https://www.alteraforum.com/forum/showthread.php?t=56631&p=232901#post232901 

 

(It is titled 'JTAG Timing constraints')  

 

I am copying my comments here... 

 

I recently did a prototyping-board and ran into JTAG configuration issues, mainly the value of VCC, to which the pull up resistors had to be pulled up (as per Max 10 'Pin Guidelines' document). These were the resistors on the 4 JTAG signals and the 3 configuration resistor (nConfig, nStatus and ConfigDone pins).  

 

After I fixed these issue on the proto board, JTAG configuration always worked on my one proto board and still does.  

 

I made same fixes on new version of boards (new pcb layout), though 1 or 2 of the JTAG signal likely increased slightly in trace-length, but really no other change. Unfortunately on the new version board (tried only one board yet), JTAG configuration is failing with nStatus always staying low, indicating that JTAG FSM is stuck in the 'reset' state. However I am able to read the 'device ID' when trying to configure, so I assume JTAG signals on the FPGA are working.  

 

Here are some other points: 

- TCK frequency is 6MHZ (As per other info out there, I could change that to 16 or 24MHz as I am using Blaster-II, using 'jtagconfig' utility in the command line, but I have been unable to do that. Nevertheless 6MHz is the slowest rate, but I wanted to try faster rates on my Proto board so see how fast I can go, where it is working. The new boards are 'nearly identical' in terms of JTAG trace-lengths and trace-widths). 

- I am using USB-Blaster II (Rev B. The ribbon cable length on it is about 8 inches. I read somewhere reducing it a lot may help but have not tried it yet.  

- I not using 'diodes and caps' on the JTAG lines, as recommended by Altera / Intel to suppress 'voltage overshoot', on either of the boards. However Altera documents states that they are Only needed if JTAG connector supply (jtag connector pin# 4) is Over 2.5V and I am only using 2.5V supply on both the boards.  

- I am using a UBGA chip, so cannot probe FPGA pins directly, but since I am able to get Device ID, I am assuming JTAG pins are alive and working.  

 

 

Pl advice a solution / debug strategy.  

Thanks
Altera_Forum
Honored Contributor I
67 Views

Hi Anand, 

I am using a custom board. 

Best regards. 

Enrico
Altera_Forum
Honored Contributor I
67 Views

Hi, 

 

Have you checked with Power Analyzer tool in quartus how much power silicon is taking? 

 

Can check the power required for your board? 

Power requirement for the board taken care? 

Is plane maintained for power planes in layout. 

And how many ground planes are there in your board and how many vias you are using to connect the ground planes connected? 

 

Best Regards, 

Anand Raj Shankar 

(This message was posted on behalf of Intel Corporation)
Altera_Forum
Honored Contributor I
67 Views

Hi, 

thanks for your reply. 

Today I notice that I don't have put the pull-up resistence on pins NCONFIG, CONF_DONE and NSTATUS :-(. I Think this is my problem... :-( 

There is a possibile configuration to bypass this problem? 

best regards 

Enrico
Altera_Forum
Honored Contributor I
67 Views

What is nCONFIG connected to? You certainly need this dedicated input pin high for normal operation. A pull-up should be fine. If this is floating then I'd expect the device to misbehave. 

 

Pull-ups on CONF_DONE & nSTATUS are less critical. They won't prevent operation if they're missing but are needed if you wish to monitor their status externally. 

 

Refer to the "MAX 10 Configuration Pins" on page 31 of the "configuration user guide (https://www.altera.com/content/dam/altera-www/global/en_us/pdfs/literature/hb/max-10/ug_m10_config.p...)" and make sure all the configuration pins are connected appropriately. Have a good read of chapter 3 as well. 

 

Sort nCONFIG and then check that all your power supply rails are good and within spec when cold. 

 

Cheers, 

Alex
Altera_Forum
Honored Contributor I
67 Views

Hi Alex, 

thanks for your suggest. I solved with a dedicated pull-up on these pins.  

I tested the MAX10 between -20°C and +80°C and it works perfectly. 

Best regards 

Enrico
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