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Altera_Forum
Honored Contributor I
1,493 Views

MAX 10 fails to run JTAG loaded SOF

I have run into an odd problem with a new board that has a Max 10 10M50SA FPGA on it. (Specifically, the 10M50SAE144) 

 

The JTAG port appears to work, I can auto-detect the FPGA correctly, and Quartus even says that it downloaded my SOF correctly. There are no error messages in the log, etc. However, the device fails to run at all. I checked all of the obvious errors, such as clocks, resets, power, pin assignments, etc., but everything appears to be in order. 

 

Then I decided to try and load SignalTap with a very simple design to verify basic functionality. Again, Quartus says it loaded the SOF correctly, but SignalTap can't find the integrated analyzer. I get "Invalid JTAG configuration" and "Instance not Found" as though I loaded nothing at all. 

 

At this point I'm not sure if I have a bad chip or am simply doing something wrong. This is a single-supply device with all power (VCCONE and VCCIO) pins running at 3.3V. The JTAG port is wired according to the documentation with zener clamps and otherwise appears to function. At this point, even if the clock weren't working, I would still expect the analyzer core to show up, but I'm not sure what else to check. This is my first Max 10 design, and there are a lot of new options that I'm not used to from working with Cyclone and Stratix parts, so I'm hoping it's a configuration issue I have missed somehow. 

 

Thanks for any help!
4 Replies
Altera_Forum
Honored Contributor I
49 Views

 

--- Quote Start ---  

The E144-pin package has an exposed ground pad at the bottom of the package. The exposed ground pad is used for electrical connectivity and not for thermal purposes. You must connect the exposed ground pad to the ground plane of the PCB. 

--- Quote End ---  

 

 

Is that the case on your board? Not connecting it will result in odd results. 

 

Cheers, 

Alex
Altera_Forum
Honored Contributor I
49 Views

Look at the nCONFIG/nSTATUS/CONF_DONE pins. If you don't have pullups on them, that's maybe your problem. If you do, nSTATUS/CONF_DONE should tell you how things are progressing. 

 

If your only way of talking to your design to know its running is via the JTAG port, have you accidentally disabled it (assigned the pins as I/O) in the design. This is easy to do by mistake - if you are intending to use JTAGEN to give you the option of using the pins as I/O in the future but haven't defined the pins in your design as you aren't using them yet, you will get unused I/Os assigned to the pins and no JTAG regardless of the state of JTAGEN.
Altera_Forum
Honored Contributor I
49 Views

Generally the MAX10 should work with SOFs in the current Environment. I only observe sometimes an issue when it comes to reprogramming: For some reason SignalTAP does not seem to load a freshly built file, after "programm" . I have to delete and reassign the file.

GBalb2
Beginner
49 Views

Hi, did you find any solution about this problem?

I've found the same issue in my new board. The JTAG seems ok, but my 10M50SA144 doesn't start after the SOF loading. No warning, no error. The nStatus/nConfig/Conf_done have the right pullups.

The signal tap says "INVALID JTAG Configuration".

Thanks for any comment.

Gabriel

 

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