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Seems Altera really like to hide the simplest information.
The MAX V data says the quartus ii memory compiler can configure the unused les as le ram.max v devices support the following memory types:
■ fifo synchronous r/w
■ fifo asynchronous r/w
■ 1 port sram
■ 2 port sram
■ 3 port sram
■ shift registers and points to the MAX_V_ug_ram_rom.pdf, but that merely says 'yes'. Then MAX V Device Selection Guide says
- Unused LEs can be converted to memory. The total number of available LE RAM bits depends on the memory mode, depth, and width configurations of the instantiated memory.
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--- Quote Start --- Can anyone point to an answer to this ? is it 1, or 8, or 16 or ? RAM Bits/LE --- Quote End --- It's < 1. You have one memory bit per LE, but usually need additional LE's for address decoding and an output MUX. Very small RAMs like the said 12x4 should work. Why don't you simply try in Quartus?
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--- Quote Start --- It's < 1. You have one memory bit per LE, but usually need additional LE's for address decoding and an output MUX. Very small RAMs like the said 12x4 should work. Why don't you simply try in Quartus? --- Quote End --- Thanks. I do not have MAX V capable Quartus installed, and was wanting to avoid the time/hassle, if the MAX V really had poor RAM support - as you confirmed. Even with their higher base-price, this will likely make the MachXO2 a better fit. (Lattice just need more QFN package options)

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