I am trying to use a MAX10M50SAE for Remote System Update using discrete logic. I have an existing UART module that I am able to download into UFM, so I only needed to modify my existing code in order to access CFM.
The On-chip Flash IP core settings have CFM sector 3 starting at address 0x10000 and going to 0x6ffff and CFM 4 going from 0x70000 to 0xb7fff and both have Read and Write Access enabled. I am able to see correct reads, writes and erases from lower addresses in sector 3. However, I am getting a warning that says "Warning (21074): Design contains 2 input pin(s) that do not drive logic" and then expanding it shows "Warning (15610): No output dependent on input pin "read_flash"" and read_flash. Meaning the IP core cuts off the 2 most significant bits meaning I cannot read the upper part of CFM sector 3 and all of CFM sector 4.
Is there a setting I am missing in the on-chip flash IP core that affects this? None of the signals that propagate down to the Flash IP core are less than 20 bits. Or is this a feature of the Flash IP?
I am able to read from the first couple of addresses from CFM sector 3 but any address that contains bits 18 and 19 I cannot access. The signal in simulation is marked as Blue and the MSBs are Z, but as long as those 2 bits are not used then everything works as expected.
Feel a little silly but I did not convert the IP core wizard addresses to byte form, so the 0x10000-0x6ffff went to 0x4000-0x1BFFF and 0x70000-0xb7fff goes to 0x1C000-0x2E000 which all fits in 17 bits. Problem solved